Programmable high current voltage supply for automatic test equipment
View Patent ↗A voltage-current conversion circuit for automatic test equipment (ATE) or a tester converts a low voltage, low current output from a power supply of the tester to a high voltage and/or high current output to be coupled to a device under test (DUT) while maintaining the sense capability of the tester power supply. In some embodiments, the voltage-current conversion circuit is implemented as a current only conversion circuit.
1. A circuit for an automatic test equipment (ATE), the ATE including a tester power supply configured to provide a drive voltage and a drive current on a force line and to receive a feedback voltage on a sense line, the circuit comprising:
an amplifier having a first input terminal coupled to the force line of the tester power supply and a second input terminal coupled to an output terminal, the output terminal providing an amplifier output signal;
an output driver having an input terminal configured to receive the amplifier output signal and an output terminal providing an output voltage indicative of the drive voltage and an output current having a current value greater than and related to the drive current, the output voltage and the output current being coupled to a pin of a semiconductor device under test (DUT); and
a feedback circuit comprising a ratiometric current sense circuit being configured to sense a current at the pin of the DUT, to scale down the sensed current and to couple the scaled current to the force line of the tester power supply as a simulated load to the tester power supply,
wherein the amplifier, the output driver and the ratiometric current sense circuit are supplied by a high current power source; and the sense line of the tester power supply is coupled to the pin of the DUT to sense the voltage at the pin of the DUT as the feedback voltage.
2. The circuit of claim 1 , wherein the output terminal of the output driver comprises a Kelvin connected force line and a sense line to be coupled to the pin of the DUT.
3. The circuit of claim 1 , wherein the output voltage generated by the output driver is regulated by the tester power supply.
4. The circuit of claim 1 , wherein the high current power source is generated from a power supply of the tester.
5. The circuit of claim 1 , wherein the amplifier comprises an operational amplifier having a non-inverting input terminal coupled to the force line of the tester power supply and an inverting input terminal coupled to an output terminal of the operational amplifier, the output terminal providing the amplifier output signal.
6. The circuit of claim 1 , wherein the output driver comprises a pair of serially connected Darlington transistors.
7. The circuit of claim 1 , wherein ratiometric current sense circuit comprises:
a current sense resistor coupled between the output terminal of the output driver and the pin of the DUT;
a second operational amplifier having a non-inverting input terminal coupled to a first terminal of the current sense resistor at the pin of the DUT, an inverting input terminal coupled to an output terminal of the second operational amplifier through a first resistor, the inverting input terminal also coupled to a second terminal of the current sense resistor at the output terminal of the output driver through a second resistor; and
a third resistor coupled between the output terminal of the second operational amplifier and the force line of the tester power supply.
8. A circuit for an automatic test equipment (ATE), the ATE including a tester power supply configured to provide a drive voltage and a drive current on a force line and to receive a first feedback voltage on a sense line, the force line and the sense line being Kelvin connected to a first node, the first feedback voltage being a voltage at the first node, the circuit comprising:
an amplifier having a first input terminal coupled to the first node of the tester power supply and a second input terminal configured to receive a second feedback voltage, the amplifier having an output terminal providing an amplifier output signal;
an output driver having an input terminal configured to receive the amplifier output signal and an output terminal providing an output voltage related to the drive voltage and an output current related to the drive current, the output voltage and the output current being coupled to a pin of a semiconductor device under test (DUT);
a feedback circuit comprising a ratiometric current sense circuit being configured to sense a current at the pin of the DUT, to scale down the sensed current and to couple the scaled current to the first node of the tester power supply as a simulated load to the tester power supply; and
the feedback circuit further comprising a ratiometric voltage sense circuit being configured to sense a voltage at the pin of the DUT, to scale down the sensed voltage and to couple the scaled voltage to the second input terminal of the amplifier as the second feedback voltage,
wherein the amplifier, the output driver and the ratiometric current sense circuit are supplied by a high voltage and/or high current power source.
9. The circuit of claim 8 , wherein the output terminal of the output driver comprises a Kelvin connected force line and a sense line to be coupled to the pin of the DUT.
10. The circuit of claim 8 , wherein the output driver provides the output voltage being related to the drive voltage and having a voltage value greater than the drive voltage, the power source being a high voltage power source.
11. The circuit of claim 8 , wherein the output driver provides the output current being related to the drive current and having a current value greater than the drive current, the power source being a high current power source.
12. The circuit of claim 8 , wherein the output driver provides the output voltage being related to the drive voltage and having a voltage value greater than the drive voltage and provides the output current being related to the drive current and having a current value greater than the drive current, the power source being a high voltage and high current power source.
13. The circuit of claim 8 , wherein the high voltage and/or high current power source is generated from a power supply of the tester.
14. The circuit of claim 8 , wherein the amplifier comprises an operational amplifier having a non-inverting input terminal coupled to the first node of the tester power supply and an inverting input terminal configured to receive the second feedback voltage, and an output terminal of the operational amplifier providing the amplifier output signal.
15. The circuit of claim 8 , wherein the output driver comprises a pair of serially connected Darlington transistors.
16. The circuit of claim 8 , wherein ratiometric current sense circuit comprises:
a current sense resistor coupled between the output terminal of the output driver and the pin of the DUT;
a second operational amplifier having a non-inverting input terminal coupled to a first terminal of the current sense resistor at the pin of the DUT, an inverting input terminal coupled to an output terminal of the second operational amplifier through a first resistor, the inverting input terminal also coupled to a second terminal of the current sense resistor at the output terminal of the output driver through a second resistor; and
a third resistor coupled between the output terminal of the second operational amplifier and the force line of the tester power supply.
17. The circuit of claim 8 , wherein ratiometric voltage sense circuit comprises a voltage divider circuit configured to receive the voltage at the pin of the DUT and to generate a divided-down voltage as the second feedback voltage.
18. A method in an automatic test equipment for providing a signal stimulus to a pin of a semiconductor device under test, the method comprising:
generating a drive voltage and a drive current at an output terminal of a tester power supply of the ATE;
boosting the drive current to generate a boosted output current;
providing the boosted output current and an output voltage indicative of the drive voltage to the pin of the semiconductor device under test;
sensing a current at the pin of the semiconductor device under test;
scaling down the sensed current to generate a scaled current;
coupling the scaled current to the output terminal of the tester power supply as a simulated load to the tester power supply;
sensing a voltage at the pin of the semiconductor device under test; and
providing the sensed voltage to the tester power supply to regulate the output voltage provided to the pin of the semiconductor device under test.
19. A method in an automatic test equipment for providing a signal stimulus to a pin of a semiconductor device under test, the method comprising:
generating a drive voltage and a drive current at an output terminal of a tester power supply of the ATE;
boosting the drive current and the drive voltage to generate a boosted output current and a boosted output voltage;
providing the boosted output current and the boosted output voltage to the pin of the semiconductor device under test;
sensing a current at the pin of the semiconductor device under test;
scaling down the sensed current to generate a scaled current;
coupling the scaled current to the output terminal of the tester power supply as a simulated load to the tester power supply;
sensing a voltage at the pin of the semiconductor device under test;
scaling down the sensed voltage to generate a scaled sense voltage; and
using the scaled sensed voltage to regulate the boosted output voltage provided to the pin of the semiconductor device under test.