IP Library Granted Patent US 10,009,552
Granted Patent B2
US 10,009,552 · App. 13/954,823 · Granted Jun 26, 2018

Imaging systems with front side illuminated near infrared imaging pixels

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,009,552
App. No.
13/954,823
Granted
Jun 26, 2018
Kind
B2
Abstract

An imaging system may include an image sensor having front side illuminated near infrared image sensor pixels. Each pixel may be formed in a graded epitaxial substrate layer such as a graded p-type epitaxial layer or a graded n-type epitaxial layer on a graded p-type epitaxial layer. Each pixel may be separated from an adjacent pixel by an isolation trench formed in the graded epitaxial layer. A deep p-well may be formed within each isolation trench. The isolation trenches and photodiodes for the pixels may be formed in the graded p-type epitaxial layer or the graded n-type epitaxial layer. The graded p-type epitaxial layer may have an increasing concentration of dopants that increases toward the backside of the image sensor. The graded n-type epitaxial layer may have an increasing concentration of dopants that increases toward the front side of the image sensor.

Claims (42)

1. An image sensor, comprising:

a graded p-type epitaxial substrate layer;

a plurality of front side illuminated image sensor pixels formed in the graded p-type epitaxial substrate layer; and

a plurality of isolation trenches in the graded p-type epitaxial substrate layer that separate adjacent front side illuminated image sensor pixels.

2. The image sensor defined in claim 1 , further comprising:

a deep p-well formed in each of the plurality of isolation trenches.

3. The image sensor defined in claim 2 , further comprising:

a passivation layer on sidewall surfaces of each of the plurality of isolation trenches.

4. The image sensor defined in claim 2 , further comprising:

a dielectric stack formed on the graded p-type epitaxial substrate layer.

5. The image sensor defined in claim 4 wherein the dielectric stack comprises metal interconnects in a dielectric material.

6. The image sensor defined in claim 5 wherein each front side illuminated image sensor pixel includes a microlens.

7. The image sensor defined in claim 6 wherein each front side illuminated image sensor pixel includes a photodiode formed in the graded p-type epitaxial substrate layer.

8. The image sensor defined in claim 7 wherein the dielectric stack is interposed between the photodiodes and the microlenses of the front side illuminated image sensor pixels.

9. An image sensor, comprising:

a graded p-type epitaxial substrate layer; a graded n-type epitaxial substrate layer on the graded p-type epitaxial substrate layer;

a plurality of front side photodiodes formed in the graded n-type epitaxial substrate layer; and

a plurality of isolation trenches in the graded n-type epitaxial substrate layer that separate adjacent photodiodes.

10. The image sensor defined in claim 9 , further comprising:

a deep p-well formed in each of the plurality of isolation trenches that extends from the graded n-type epitaxial substrate layer at least to the graded p-type epitaxial substrate layer.

11. The image sensor defined in claim 10 , further comprising:

oxide material in each of the plurality of isolation trenches.

12. The image sensor defined in claim 11 , further comprising:

a dielectric stack on the graded n-type epitaxial substrate layer.

13. The image sensor defined in claim 12 wherein the graded n-type epitaxial substrate layer is interposed between the dielectric stack and the graded p-type epitaxial substrate layer.

14. The image sensor defined in claim 13 , further comprising:

a plurality of microlenses, wherein each of the plurality of microlenses is configured to focus light onto an associated one of the plurality of photodiodes through the dielectric stack.

15. The image sensor defined in claim 14 wherein the dielectric stack in interposed between the plurality of microlenses and the plurality of photodiodes.

16. The image sensor defined in claim 15 , further comprising:

a plurality of color filter elements, wherein each of the plurality of microlenses is configured to focus light onto the associated one of the plurality of photodiodes through an associated one of the color filter elements and through the dielectric stack.

17. A system, comprising:

a central processing unit;

memory;

input-output circuitry; and

an imaging device, wherein the imaging device comprises:

a graded epitaxial substrate layer, wherein the graded epitaxial substrate layer comprises a dopant; and

an array of front side illuminated near infrared pixels in the graded epitaxial substrate layer, wherein each front side illuminated near infrared pixel is separated from an adjacent front side illuminated near infrared pixel by a deep isolation trench formed in the graded epitaxial substrate layer, wherein each of the front side illuminated near infrared pixels comprises a front side through which light is received and a back side opposite the front side, and wherein the concentration of the dopant in the graded epitaxial substrate layer increases towards the back side of each of the front side illuminated near infrared pixels.

18. The system defined in claim 17 wherein the imaging device further comprises a deep p-well in each deep isolation trench.

19. The system defined in claim 18 wherein the dopant comprises a p-type dopant and the graded epitaxial substrate layer comprises a graded p-type epitaxial layer.

20. The system defined in claim 19 further comprising:

an additional dopant, wherein the additional dopant comprises an n-type dopant; and

an additional graded epitaxial substrate layer, wherein the additional graded epitaxial substrate layer comprises a graded n-type epitaxial layer that is doped with the n-type dopant.

Assignments (5)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2014
From: APTINA IMAGING CORPORATION
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 034673/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 30, 2013
From: VELICHKO, SERGEY; AGRANOV, GENNADIY
To: APTINA IMAGING CORPORATION
Reel/Frame 030909/0252 →