IP Library Granted Patent US 9,105,546
Granted Patent B2
US 9,105,546 · App. 13/954,844 · Granted Aug 11, 2015

Imaging systems with backside illuminated near infrared imaging pixels

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Quick Facts
Patent No.
US 9,105,546
App. No.
13/954,844
Granted
Aug 11, 2015
Kind
B2
Abstract

An imaging system may include an image sensor having backside illuminated near infrared image sensor pixels. Each pixel may be formed in a graded epitaxial substrate layer such as a graded n-type epitaxial layer. Each pixel may be separated from an adjacent pixel by an isolation trench formed in the graded epitaxial layer. The isolation trench may be a continuous isolation trench or may be formed from a combined front side isolation trench and backside isolation trench that are separated by a wall structure. A buried front side reflector may be provided that reflects light such as infrared light that has passed through a pixel back into the pixel, thereby effectively doubling the silicon absorption depth of the pixels.

Claims (32)

1. An image sensor, comprising:

a graded n-type epitaxial substrate layer;

a plurality of photodiodes formed in the graded n-type epitaxial substrate layer;

a plurality of isolation trenches in the graded n-type epitaxial substrate layer that separate adjacent photodiodes;

a reflective layer; and

a dielectric stack on the reflective layer, wherein the reflective layer is interposed between the plurality of photodiodes and the dielectric stack.

2. The image sensor defined in claim 1 wherein each isolation trench comprises a backside isolation trench that extends from a back side of the graded n-type epitaxial substrate layer into the graded n-type epitaxial substrate layer.

3. The image sensor defined in claim 1 wherein each isolation trench comprises a front side isolation trench that extends from a front side of the graded n-type epitaxial substrate layer into the graded n-type epitaxial substrate layer.

4. The image sensor defined in claim 3 , further comprising:

a p-well formed in each front side isolation trench.

5. The image sensor defined in claim 1 wherein each isolation trench comprises a backside isolation trench that extends from a back side of the graded n-type epitaxial substrate layer into the graded n-type epitaxial substrate layer and a corresponding front side isolation trench that extends from a front side of the graded n-type epitaxial substrate layer into the graded n-type epitaxial substrate layer in the direction of the backside isolation trench.

6. The image sensor defined in claim 5 wherein the backside isolation trench extends through to the front side isolation trench forming a continuous isolation trench that extends from the front side of the graded n-type epitaxial substrate layer to the backside of the graded n-type epitaxial substrate layer.

7. The image sensor defined in claim 5 , further comprising:

a structure between the front side isolation trench and the backside isolation trench.

8. The image sensor defined in claim 1 wherein the graded n-type epitaxial substrate layer includes n-type carriers in a concentration that increases with increased distance from a backside of the graded n-type epitaxial substrate layer.

9. An image sensor, comprising:

a graded n-type epitaxial substrate layer;

a plurality of photodiodes formed in the graded n-type epitaxial substrate layer;

a plurality of isolation trenches in the graded n-type epitaxial substrate layer that separate adjacent photodiodes;

a reflective layer; and

a dielectric stack on the reflective layer, wherein the reflective layer is interposed between the plurality of photodiodes and the dielectric stack wherein each isolation trench comprises a backside isolation trench that extends from a back side of the graded n-type epitaxial substrate layer into the graded n-type epitaxial substrate layer and a front side isolation trench that extends from a front side of the graded n-type epitaxial substrate layer into the graded n-type epitaxial substrate layer and wherein the configuration of the backside isolation trench is different from the configuration of the front side isolation trench.

10. A system, comprising:

a central processing unit;

memory;

input-output circuitry; and

an imaging device, wherein the imaging device comprises:

a graded epitaxial substrate layer; and

an array of backside illuminated near infrared pixels in the graded epitaxial substrate layer, wherein each backside illuminated near infrared pixel is separated from an adjacent backside illuminated near infrared pixel by a deep isolation trench formed in the graded epitaxial substrate layer, and wherein the graded epitaxial substrate layer includes carriers in a concentration that increases with increased distance from a backside of the graded epitaxial substrate layer.

11. The system defined in claim 10 wherein each deep isolation trench comprises a front side isolation trench.

12. The system defined in claim 10 wherein each deep isolation trench comprises a backside isolation trench.

13. The system defined in claim 10 wherein each deep isolation trench comprises a front side isolation trench and an associated backside isolation trench.

14. The system defined in claim 10 wherein each backside illuminated near infrared pixel further comprises a front side reflector.

Assignments (6)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2014
From: APTINA IMAGING CORPORATION
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 034673/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE OF THE SECOND INVENTOR PREVIOUSLY RECORDED ON REEL 030909 FRAME 0326. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT.. Recorded Aug 2, 2013
From: VELICHKO, SERGEY; AGRANOV, GENNADIY
To: APTINA IMAGING CORPORATION
Reel/Frame 030946/0674 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 30, 2013
From: VELICHKO, SERGEY; AGRANOV, GENNADIY
To: APTINA IMAGING CORPORATION
Reel/Frame 030909/0326 →