Integrated circuit package with vacant cavity
View Patent ↗Integrated circuit packages with cavity are disclosed. A disclosed integrated circuit package includes a first die. A second die may be coupled to the first die by attaching the first die to a top surface of the second die. A blocking element such as a barrier structure may be formed that surrounds the second die. A cavity may be formed between the blocking element and the first die that encloses the second die. The barrier structure may help prevent underfill material from entering the cavity during underfill deposition processes. A heat spreading lid may cover the first die, second die and package substrate.
1. A method for packaging integrated circuits on a package substrate, the method comprising:
attaching a first integrated circuit die to a top surface of a second integrated circuit die to form an integrated circuit package;
depositing underfill material between the first integrated circuit die and the second integrated circuit die; and
forming a cavity that allows for thermal expansion of the second integrated circuit die within the cavity, wherein forming the cavity comprises:
forming a first barrier structure on a bottom surface of the first integrated circuit die, wherein the first barrier structure protrudes from the bottom surface of the first integrated circuit die;
forming a second barrier structure on a top surface of the package substrate, wherein the first barrier structure protrudes from the top surface of the package substrate, and wherein the first barrier structure and the second barrier structure are formed from metal; and
mounting the integrated circuit package on the top surface of the package substrate so that the first and second barrier structures mate to form the cavity.
2. The method defined in claim 1 further comprising:
depositing additional underfill material between the package substrate and the integrated circuit package, wherein the first and second barrier structures prevent the additional underfill material from entering the cavity.
3. The method defined in claim 1 further comprising:
disposing a heat spreading lid over the first and second integrated circuit dies and the package substrate.