IP Library Granted Patent US 8,803,220
Granted Patent B2
US 8,803,220 · App. 13/974,696 · Granted Aug 12, 2014

P-type control gate in non-volatile storage

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,803,220
App. No.
13/974,696
Granted
Aug 12, 2014
Kind
B2
Abstract

Non-voltage storage and techniques for fabricating non-volatile storage are disclosed. In some embodiments, at least a portion of the control gates of non-volatile storage elements are formed from p-type polysilicon. In one embodiment, a lower portion of the control gate is p-type polysilicon. The upper portion of the control gate could be p-type polysilicon, n-type polysilicon, metal, metal nitride, etc. P-type polysilicon in the control gate may not deplete even at high Vpgm. Therefore, a number of problems that could occur if the control gate depleted are mitigated. For example, a memory cell having a control gate that is at least partially p-type polysilicon might be programmed with a lower Vpgm than a memory cell formed from n-type polysilicon.

Claims (45)

1. A non-volatile storage system, comprising:

non-volatile storage elements, an individual non-volatile storage element includes:

a floating gate formed from an n-type semiconductor;

inter-poly dielectric; and

a control gate that includes a lower portion formed from a p-type semiconductor, an upper portion formed from the n-type semiconductor, and a conductive barrier layer between the lower portion and the upper portion of the control gate, the inter-poly dielectric resides between the floating gate and the control gate.

2. The non-volatile storage system of claim 1 , wherein the conductive barrier layer comprises one or more of titanium nitride, tantalum nitride, or tungsten nitride.

3. The non-volatile storage system of claim 1 , wherein the conductive barrier layer comprises a silicide.

4. A non-volatile storage system, comprising:

non-volatile storage elements, an individual non-volatile storage element includes:

a floating gate formed from an n-type semiconductor;

inter-poly dielectric; and

a control gate that includes a lower portion formed from a p-type semiconductor and an upper portion formed from the n-type semiconductor, the inter-poly dielectric resides between the floating gate and the control gate, wherein the control gate is highly doped such that a p-n junction between the upper portion and the lower portion will break down during programming.

5. A non-volatile storage system, comprising:

non-volatile storage elements, an individual non-volatile storage element includes:

a floating gate formed from an n-type semiconductor;

inter-poly dielectric; and

a control gate that includes a lower portion formed from a p-type semiconductor and an upper portion formed from the n-type semiconductor, the inter-poly dielectric resides between the floating rate and the control gate; and

a transistor having a control gate that includes a continuous region of the n-type semiconductor in a region that coincides with the floating gates, the inter-poly dielectric and the control gates of the non-volatile storage elements.

6. The non-volatile storage system of claim 5 , wherein the control gates of the non-volatile storage elements are silicided such that p-n junctions between the upper portions and the lower portions of the control gates of the non-volatile storage elements are eliminated.

7. A non-volatile storage system, comprising:

non-volatile storage elements, an individual non-volatile storage element includes:

a floating gate formed from an n-type semiconductor;

inter-poly dielectric; and

a control gate formed from a p-type semiconductor; and

a select transistor associated with the non-volatile storage elements, the select transistor includes:

a control gate that includes a lower portion of the n-type semiconductor and an upper portion of the p-type semiconductor; and

a conductive barrier layer between the lower portion and the upper portion of the control gate of the select transistor.

8. The non-volatile storage system of claim 7 , wherein the conductive barrier layer comprises a metal.

9. The non-volatile storage system of claim 8 , wherein the metal comprises one or more of tungsten, titanium, or tantalum.

10. The non-volatile storage system of claim 7 , wherein the conductive barrier layer comprises a metal nitride.

11. The non-volatile storage system of claim 10 , wherein the metal nitride comprises one or more of tungsten nitride, titanium nitride, or tantalum nitride.

12. The non-volatile storage system of claim 7 , wherein the conductive barrier layer comprises a silicide.

13. A non-volatile storage system, comprising:

a NAND string of non-volatile storage elements, an individual non-volatile storage element includes:

a floating gate formed from an n-type semiconductor;

inter-poly dielectric; and

a control gate that includes a lower portion formed from a p-type semiconductor and an upper portion formed from the n-type semiconductor, the inter-poly dielectric resides between the floating gate and the control gate;

a select transistor associated with the NAND string, the select transistor including:

a control gate that includes a continuous region of the n-type semiconductor in a region that coincides with the floating gates, the inter-poly dielectric and the control gates of the non-volatile storage elements.

14. The non-volatile storage system of claim 13 , wherein the control gates of the non-volatile storage elements include:

a conductive barrier layer between the lower and upper portion of the control gates.

15. The non-volatile storage system of claim 14 , wherein the conductive barrier layer comprises one or more of titanium nitride, tantalum nitride, or tungsten nitride.

16. The non-volatile storage system of claim 14 , wherein the wherein the conductive barrier layer comprises a silicide.

17. The non-volatile storage system of claim 13 , wherein the control gates of the non-volatile storage elements are silicided such that p-n junctions between the upper portions and the lower portions of the control gates of the non-volatile storage elements are eliminated.

18. The non-volatile storage system of claim 13 , wherein control gates of the non-volatile storage elements are highly doped such that a p-n junction between the upper and lower portions will break down during high field stress.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 8, 2025
From: SANDISK TECHNOLOGIES, INC.
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 070778/0175 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2024
From: SANDISK TECHNOLOGIES LLC
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 069796/0423 →
CHANGE OF NAME Recorded May 25, 2016
From: SANDISK TECHNOLOGIES INC
To: SANDISK TECHNOLOGIES LLC
Reel/Frame 038807/0948 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 23, 2013
From: ORIMOTO, TAKASHI WHITNEY; SUYAMA, ATSUSHI; TIAN, MING; CHIN, HENRY; CHIEN, HENRY; PURAYATH, VINOD ROBERT; LEE, DANA
To: SANDISK CORPORATION
Reel/Frame 031073/0698 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 23, 2013
From: SANDISK CORPORATION
To: SANDISK TECHNOLOGIES INC.
Reel/Frame 031073/0767 →