Microelectronic device packages, stacked microelectronic device packages, and methods for manufacturing microelectronic devices
A stackable microelectronic package includes a first microelectronic die attached to and electrically connecting with a first substrate. A second microelectronic die is attached to the first die on one side, and to a second substrate on the other side. Electrical connections are made between the first die and the first substrate, between the second die and the second substrate, and between the first and second substrates, e.g., via wire bonding. The electrical connecting elements are advantageously encased in a molding compound. Exposed contacts on the first and/or second substrates, not covered by the molding compound, provide for electrical connections between the package, and another package stacked onto the package. The package may avoid coplanarity factors, can be manufactured using existing equipment, allows for intermediate testing, and can also offer a thinner package height.
1. A microelectronic package, comprising:
a first substrate having a first external contact at a first surface and a first wire bond contact at a second surface opposite the first surface;
a first microelectronic die proximate to the first substrate;
a second substrate having a second external contact and a second wire bond contact at a third surface facing away from the first substrate;
a second microelectronic die proximate to the second substrate;
wherein the first and second microelectronic dies each have an active side including a plurality of active terminals, and a back side, and wherein the back side of the first microelectronic die is attached to the back side of the second microelectronic die;
a first wire connecting the first surface of the first substrate to the first microelectronic die; and
a molding compound at least partially encapsulating the first and second substrates and the first and second dies without covering the first external contact or the second external contact.
2. The microelectronic package of claim 1 , further comprising a second wire connecting the first wire bond contact and the second wire bond contact.
3. The microelectronic package of claim 1 , further comprising a mold compound encapsulating the first and second wires.
4. The microelectronic package of claim 1 wherein the first substrate is larger than the second substrate.
5. The microelectronic package of claim 1 wherein the first microelectronic die comprises a board-on-chip package construction.
6. The microelectronic package of claim 1 wherein the second microelectronic die comprises a flip-chip package construction.
7. The microelectronic package of claim 1 , further comprising:
a first solder ball attached to the first external contact; and
a second solder ball attached to the second external contact.
8. A microelectronic package, comprising:
a first substrate having a first external contact at a first surface and a first wire bond contact at a second surface opposite the first surface, wherein the first substrate has a through opening;
a first microelectronic die electrically connecting with the first substrate;
a second substrate having a second external contact and a second wire bond contact at a third surface facing away from the first substrate and a fourth surface opposite the third surface;
a second microelectronic die between the first and second substrates, the second microelectronic die being attached to the first microelectronic die and adjoining the fourth surface;
a wire connecting the first wire bond contact and the second wire bond contact;
wires extending from a plurality of contacts on the first die to the first surface of the first substrate via the through opening; and
a molding compound at least partially encapsulating the first and second substrates, the first and second microelectronic dies and the wire without covering the first external contact or the second external contact.
9. The microelectronic package of claim 8 with the second substrate having an exposed grid array of electrical contacts to allow for a stacking assembly of two or more package assemblies.
10. The microelectronic package of claim 8 with the first and second microelectronic dies each having an active side including a plurality of active terminals, and a back side, and with the back side of the first microelectronic die attached to the back side of the second microelectronic die.