IP Library Granted Patent US 9,344,647
Granted Patent B2
US 9,344,647 · App. 14/012,403 · Granted May 17, 2016

Imaging systems with dynamic shutter operation

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Quick Facts
Patent No.
US 9,344,647
App. No.
14/012,403
Granted
May 17, 2016
Kind
B2
Abstract

An imaging system may include an image sensor having an array of image pixels. Each image pixel may include an electronic shutter for controlling when a photosensor in the image pixel accumulates charge. The electronic shutter may be operable in an open state during which charge is allowed to accumulate on the photosensor and a closed state during which charge is drained from the photosensor. The electronic shutter may be cycled through multiple open and closed states during an image frame capture. At the end of each open state, the charge that has been acquired on the photosensor may be transferred from the photosensor to a pixel memory element. By breaking up the total exposure time for a pixel during an image frame into shorter, non-continuous periods of exposure time, dynamic scenery image artifacts may be minimized while maintaining the desired total exposure time.

Claims (38)

1. A method for capturing image data with first and second image pixels during an image frame, wherein the first image pixel comprises a photosensor, a power supply terminal, a first transistor coupled between the power supply terminal and the photosensor, a charge storage region, a charge readout circuit coupled between the charge storage region and an output line, and a second transistor coupled between the photosensor and the charge storage region, the method comprising:

with the photosensor in the first image pixel, accumulating a first amount of charge over a first exposure time, wherein the first exposure time is non-continuous and comprises multiple integration periods that are each shorter than the first exposure time, wherein the integration periods are separated by non-integration periods;

prior to each integration period, resetting the photosensor using the first transistor;

at the end of each integration period, transferring a portion of the first amount of charge from the photosensor to the charge storage region using the second transistor;

asserting the first transistor during each non-integration period, wherein charge is drained from the photosensor when the first transistor is asserted; and

with the second image pixel, accumulating a second amount of charge over a second exposure time, wherein the second exposure time is continuous and overlaps the integration periods and non-integration periods of the first image pixel.

2. The method defined in claim 1 further comprising:

with the charge readout circuit, supplying a signal to the output line corresponding to the first amount of charge on the charge storage region.

3. The method defined in claim 2 wherein transferring the portion of the first amount of charge from the photosensor to the charge storage region at the end of each integration period comprises transferring all collected charge that accumulated on the photosensor during the integration period to the charge storage region.

4. The method defined in claim 2 wherein the integration periods occur at uniform intervals.

5. The method defined in claim 2 wherein the integration periods occur at random intervals.

6. The method defined in claim 2 wherein the integration periods occur in synchronized bursts.

7. The method defined in claim 1 further comprising:

deasserting the first transistor during the integration periods, wherein when the first transistor is deasserted, charge accumulates on the photosensor.

8. A method for capturing high dynamic range image data with an array of image pixels during an image frame, wherein each image pixel in the array comprises a photosensor and a shutter element, wherein the shutter element is operable in an open state during which the photosensor accumulates charge and a closed state during which charge is drained from the photosensor, the method comprising:

with a first plurality of image pixels in the array, accumulating charge during a first exposure period;

with a second plurality of image pixels in the array, accumulating charge during a second exposure period, wherein the second exposure period is shorter than the first exposure period, wherein the second exposure period is non-continuous and comprises a plurality of integration periods, wherein the first exposure period is continuous and overlaps at least two of the integration periods of the second exposure period; and

with control circuitry, placing the shutter elements associated with the second plurality of image pixels in the open state during each integration period and in the closed state.

9. The method defined in claim 8 further comprising:

with the control circuitry, placing the shutter elements associated with the first plurality of image pixels in the open state during the first exposure period.

10. The method defined in claim 8 wherein the integration periods occur at uniform intervals.

11. The method defined in claim 8 wherein the integration periods occur at random intervals.

12. The method defined in claim 8 wherein the integration periods occur in synchronized bursts.

13. The method defined in claim 8 wherein each shutter element comprises an electronic shutter element, wherein each electronic shutter element is electrically coupled between a power supply terminal and an associated one of the photosensors, and wherein placing the shutter elements associated with the second plurality of image pixels in the closed state comprises resetting the photosensors associated with the second plurality of image pixels to a power supply voltage.

14. The method defined in claim 8 further comprising:

in between the integration periods, draining charge from the photosensors associated with the second plurality of image pixels.

15. The method defined in claim 8 further comprising:

for each image pixel in the second plurality of image pixels, transferring the charge accumulated during each integration period from the photosensor to a charge storage region; and

with a readout circuit, outputting a signal corresponding to the charge on the charge storage region.

16. A system, comprising:

a central processing unit;

memory;

input-output circuitry; and

an imaging device, wherein the imaging device comprises:

a pixel array having a plurality of image pixels including short-exposure pixels and long-exposure pixels, wherein at least one short-exposure pixel in the pixel array comprises an electronic shutter for controlling when the short-exposure pixel accumulates charge, wherein the electronic shutter is operable in an open state during which the short-exposure pixel accumulates charge and a closed state during which charge is drained from the short-exposure pixel, wherein the short-exposure pixel is configured to cycle through multiple integration periods during which the electronic shutter is in the open state and multiple non-integration periods during which the electronic shutter is in the closed state, and wherein the long-exposure pixel accumulates charge over a continuous exposure period that overlaps at least two of the integration periods of the short-exposure pixel; and

processing circuitry that combines image data from the short-exposure pixels with image data from the long-exposure pixels to form a high-dynamic range image.

17. The system defined in claim 16 wherein the short-exposure pixel comprises a photosensor, a storage region, and a transfer transistor, and wherein the transfer transistor is configured to transfer an amount of charge accumulated on the photosensor during each integration period from the photosensor to the storage region.

18. The system defined in claim 17 wherein the electronic shutter comprises a shutter gate coupled between the photosensor and a power supply terminal and wherein the shutter gate is configured to drain charge from the photosensor during each non-integration period.

Assignments (5)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2014
From: APTINA IMAGING CORPORATION
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 034673/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 28, 2013
From: AGRANOV, GENNADIY; VELICHKO, SERGEY; LADD, JOHN W.
To: APTINA IMAGING CORPORATION
Reel/Frame 031103/0371 →