IP Library Granted Patent US 8,664,711
Granted Patent B2
US 8,664,711 · App. 14/019,508 · Granted Mar 4, 2014

Dielectric stack

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Quick Facts
Patent No.
US 8,664,711
App. No.
14/019,508
Granted
Mar 4, 2014
Kind
B2
Abstract

A method of forming a device is disclosed. The method includes providing a substrate and forming a device layer on the substrate having a formed thickness T FD . A capping layer is formed on the substrate having a formed thickness T FC . Forming the capping layer consumes a desired amount of the device layer to cause the thickness of the device layer to be about the target thickness T TD . The thickness of the capping layer is adjusted from T FC to about a target thickness T TC .

Claims (35)

1. A device comprising:

a substrate;

a first dielectric device layer on the substrate comprising a target thickness T TFD ; and

a second dielectric device layer over the first dielectric device layer having a target thickness T TSD , wherein a lower portion of the second dielectric device layer comprises a consumed upper portion of the first dielectric device layer.

2. The device of claim 1 wherein:

the first dielectric device layer comprises a nitride material and the second dielectric device layer comprises a thermally grown oxide material.

3. The device of claim 2 wherein the nitride material comprises silicon nitride and the thermally grown oxide material comprises in-situ steam generated (ISSG) silicon oxide.

4. The device of claim 1 wherein a top surface of the second dielectric device layer comprises an etch surface.

5. The device of claim 1 comprises a third device layer below the first dielectric device layer.

6. The device of claim 5 wherein the first, second and third device layers form a dielectric stack.

7. The device of claim 1 wherein the thicknesses T TFD and T TSD are tightly controlled.

8. The device of claim 1 wherein the consumed upper portion of the first dielectric device layer is based on growth rate of the second dielectric device layer represented by a formula y=1.6301x−1.0003, wherein y is an amount of grown second dielectric device layer and x is an amount of consumption of the first dielectric device layer.

9. The device of claim 8 wherein:

the first dielectric device layer comprises a nitride material and the second dielectric device layer comprises a thermally grown oxide material.

10. A device comprising:

a substrate; and

a gate having a gate electrode and a gate dielectric stack disposed over the substrate, wherein the gate dielectric stack comprises

a first device layer on the substrate comprising a target thickness T TFD , and

a second device layer over the first device layer having a target thickness T TSD , wherein a lower portion of the second device layer comprises a consumed upper portion of the first device layer.

11. The device of claim 10 wherein:

the first device layer comprises a nitride material and the second device layer comprises a thermally grown oxide material.

12. The device of claim 11 wherein the nitride material comprises silicon nitride and the thermally grown oxide material comprises in-situ steam generated (ISSG) silicon oxide.

13. The device of claim 10 wherein a top surface of the second device layer comprises an etch surface.

14. The device of claim 10 wherein the dielectric stack further comprises a third device layer below the first device layer.

15. The device of claim 14 wherein the first, second and third device layers serve as a gate dielectric of a non-volatile memory.

16. The device of claim 15 wherein the first device layer serves as a charge storage layer, the second device layer serves a capping layer and the third device layer serves as a tunneling layer.

17. The device of claim 10 wherein the consumed upper portion of the first device layer is based on growth rate of the second device layer represented by a formula y=1.6301x−1.0003, wherein y is an amount of grown second device layer and x is an amount of consumption of the first device layer.

18. A device comprising:

a substrate;

a base dielectric layer on the substrate;

first dielectric device layer on the base dielectric layer comprising a target thickness T TFD ; and

a second dielectric capping layer over the first dielectric device layer having a target thickness T TSD , wherein a lower portion of the second dielectric capping layer comprises a consumed upper portion of the first dielectric device layer.

19. The device of claim 18 wherein:

the first device layer comprises a nitride material and the second and third dielectric layers comprise a thermally grown oxide material.

20. The device of claim 19 wherein the nitride material comprises silicon nitride and the thermally grown oxide material comprises in-situ steam generated (ISSG) silicon oxide.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Nov 19, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
Reel/Frame 054481/0673 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 19, 2020
From: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 054600/0031 →
RELEASE OF SECURITY INTEREST Recorded Nov 18, 2020
From: WILMINGTON TRUST, NATIONAL ASSOCIATION
To: GLOBALFOUNDRIES INC.
Reel/Frame 054475/0718 →
SECURITY AGREEMENT Recorded Nov 27, 2018
From: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
To: WILMINGTON TRUST, NATIONAL ASSOCIATION
Reel/Frame 047660/0203 →