Forming light-emitting diodes using seed particles
A device includes a substrate; a group III-V semiconductor layer disposed over the substrate; and a seed layer disposed over the group III-V semiconductor layer. The substrate is a printed circuit board. The group III-V semiconductor layer includes a multiple quantum well (MQW) layer, a p-type doped layer, and an n-type doped layer. The seed layer includes a plurality of miniature elements. The miniature elements each contain a single-crystal material suitable for epitaxially growing the group III-V semiconductor layer. The miniature elements collectively cover less than 100% of a surface of the group III-V semiconductor layer.
1. A device, comprising:
a substrate, wherein the substrate is a printed circuit board;
a group III-V semiconductor layer disposed over the substrate; and
a seed layer disposed over the group III-V semiconductor layer;
wherein:
the group III-V semiconductor layer includes a multiple quantum well (MQW) layer, a p-type doped layer, and an n-type doped layer;
the seed layer includes a plurality of miniature elements;
the miniature elements each contain a single-crystal material suitable for epitaxially growing the group III-V semiconductor layer; and
the miniature elements collectively cover less than 100% of a surface of the group III-V semiconductor layer.
2. The device of claim 1 , wherein the group III-V semiconductor layer includes gallium nitride.
3. The device of claim 2 , wherein a lattice constant mismatch between the single-crystal material of the seed layer and the group III-V semiconductor layer is sufficiently small to grow single-crystal gallium nitride on the single-crystal material.
4. The device of claim 1 , wherein the single-crystal material includes gallium nitride, silicon carbide, or aluminum nitride.
5. The device of claim 1 , wherein the seed layer covers more than 50% of the surface of the group III-V semiconductor layer.
6. The device of claim 1 , wherein the miniature elements have substantially similar shapes and sizes.
7. The device of claim 1 , wherein the miniature elements have varying shapes and sizes.
8. The device of claim 1 , wherein the miniature elements are randomly distributed over the surface of the group III-V semiconductor layer.
9. The device of claim 1 , wherein the miniature elements have an average diameter that is no less than about 1 micron.
10. A device, comprising:
a packaging substrate, wherein the packaging substrate contains circuitry printed or embedded thereon;
a group III-V semiconductor layer disposed over the packaging substrate; and
a plurality of miniature elements disposed over portions of the group III-V semiconductor layer, wherein the miniature elements contain a single-crystal material whose lattice constant mismatch with the group III-V semiconductor layer is sufficiently small such that epitaxial growth of the group III-V semiconductor layer can occur on the single-crystal material, wherein the group III-V semiconductor layer is disposed on a first side of the miniature elements, and wherein a second side of the miniature elements is free of being in contact with any layer containing a group III-V compound, the second side being opposite the first side.
11. The device of claim 10 , wherein:
the group III-V semiconductor layer includes gallium nitride; and
the single-crystal material includes gallium nitride, silicon carbide, or aluminum nitride.
12. The device of claim 10 , wherein the miniature elements have substantially similar shapes and sizes.
13. The device of claim 10 , wherein the miniature elements have varying shapes and sizes.
14. The device of claim 10 , wherein the miniature elements are randomly distributed over the surface of the group III-V semiconductor layer.
15. The device of claim 10 , wherein the miniature elements have an average diameter that is no less than about 1 micron.
16. A device, comprising:
a silicon substrate;
a first dielectric layer disposed over the silicon substrate;
a second dielectric layer disposed over the first dielectric layer, wherein the second dielectric layer is in direct contact with the first dielectric layer; and
a plurality of miniature elements each partially embedded within the second dielectric layer, wherein the miniature elements each contain a single-crystal material whose lattice constant mismatch with a group III-V semiconductor material is configured to be sufficiently small so that the group III-V semiconductor material can be epitaxially grown on the single-crystal material.
17. The device of claim 16 , further comprising: a semiconductor layer disposed over the second dielectric layer and the plurality of miniature elements, wherein the semiconductor layer contains the group III-V semiconductor material.
18. The device of claim 16 , wherein:
the group III-V semiconductor layer includes gallium nitride; and
the single-crystal material includes gallium nitride, silicon carbide, or aluminum nitride.
19. The device of claim 16 , wherein the miniature elements have varying shapes and sizes and are randomly distributed over a surface of the group III-V semiconductor layer.
20. The device of claim 1 , wherein the substrate is a packaging substrate.