Alignment of single-mode polymer waveguide (PWG) array and silicon waveguide (SiWG) array for providing adiabatic coupling
View Patent ↗Alignment of a single-mode polymer waveguide (PWG) array fabricated on a polymer with a silicon waveguide (SiWG) array fabricated on a silicon (Si) chip and thereby realizing an adiabatic coupling. A stub and a groove are fabricated with high precision and made to function as the absolute positioning reference to provide a self-alignment according to the groove and the stub. In a PWG patterning by photolithography, plural masks are used, but the fabrication is made along the alignment base line for mask and thus a high precision is achieved with respect to error δx. In a PWG patterning by nano imprint, a high precision in the fabrication is also achieved with respect to error δx and δy.
1. A method of fabricating on a polymer a single-mode polymer waveguide (PWG) array and a stub so that the single-mode polymer waveguide (PWG) array and the stub are aligned with a silicon waveguide (SiWG) array fabricated on a silicon (Si) chip and a groove fabricated along a direction in which the SiWG is fabricated, whereby an adiabatic coupling is realized, the method comprising the steps of:
coating a clad layer on the polymer;
preparing a first mask along an alignment base line above a core layer and a under clad layer coated;
fabricating a core array on the clad layer according to a photolithography process with the first mask, wherein the refractive index of a material of the core layer being larger than the refractive index of a material of the clad layer;
coating a base layer used to fabricate the stub by use of a same type polymer material as that of the core array, so that the core array is covered by the base layer;
preparing a second mask having an exposure pattern different from the first mask along the same alignment base line used in the preparation of the first mask; and
fabricating the stub according to a photolithography process with the second mask.
2. The method according to claim 1 , further comprising the steps of:
preparing the silicon (Si) chip having the silicon waveguide (SiWG) array and the groove fabricated thereon;
preparing the polymer having the single-mode polymer waveguide (PWG) array and the stub fabricated thereon;
aligning the silicon chip with the polymer so that a spatial relationship is provided to realize the adiabatic coupling; and
securing the silicon chip and the polymer by use of an optical epoxy or a UV adhesive.
3. The method according to claim 2 , further comprising the steps of:
preparing an MTP connector secured to the polymer;
preparing an interposer secured to the silicon chip; and
encapsulating these.
4. The method according to claim 3 , further comprising the steps of:
preparing a heat sink secured to the silicon chip;
preparing a cover plate (the outer shell of a package); and
covering the whole body by the cover plate.
5. The method according to claim 1 , wherein the width of core of the single-mode polymer waveguide (PWG) array fabricated on the polymer is approximately 5 μm with fabrication error of ±20% and the width of core of the silicon waveguide (SiWG) array fabricated on the silicon (Si) chip is approximately several hundred nm to 1 μm with fabrication error of ±30%.
6. The method according to claim 1 , wherein both the material of the core used to fabricate the core array by the photolithography process with the first mask and the material of the base layer used to fabricate the stub by the photolithography process with the second mask are selected from the same type polymer materials, such as acrylic, epoxy or polyimide, and wherein a developer and a rinse liquid used in the photolithography process with the first mask can be used again as it is as a developer and a rinse liquid used in the photolithography process with the second mask.
7. A combination of a stub fabricated on a polymer and a groove fabricated on a silicon (Si) chip prepared by a method of fabricating on a polymer a single-mode polymer waveguide (PWG) array and a stub so that the single-mode polymer waveguide (PWG) array and the stub are aligned with a silicon waveguide (SiWG) array fabricated on a silicon (Si) chip and a groove fabricated along a direction in which the SiWG is fabricated, whereby an adiabatic coupling is realized, the method comprising the steps of:
coating a clad layer on the polymer;
preparing a first mask along an alignment base line above a core layer and a under clad layer coated;
fabricating a core array on the clad layer according to a photolithography process with the first mask, wherein the refractive index of a material of the core layer being larger than the refractive index of a material of the clad layer;
coating a base layer used to fabricate the stub by use of a same type polymer material as that of the core array, so that the core array is covered by the base layer;
preparing a second mask having an exposure pattern different from the first mask along the same alignment base line used in the preparation of the first mask; and
fabricating the stub according to a photolithography process with the second mask.
8. The method according to claim 7 , further comprising the steps of:
preparing the silicon (Si) chip having the silicon waveguide (SiWG) array and the groove fabricated thereon;
preparing the polymer having the single-mode polymer waveguide (PWG) array and the stub fabricated thereon;
aligning the silicon chip with the polymer so that a spatial relationship is provided to realize the adiabatic coupling; and
securing the silicon chip and the polymer by use of an optical epoxy or a UV adhesive.
9. The method according to claim 8 , further comprising the steps of:
preparing an MTP connector secured to the polymer;
preparing an interposer secured to the silicon chip; and
encapsulating these.
10. The method according to claim 9 , further comprising the steps of:
preparing a heat sink secured to the silicon chip;
preparing a cover plate which is the outer shell of a package; and
covering the whole body by the cover plate.
11. The method according to claim 7 , wherein the width of core of the single-mode polymer waveguide (PWG) array fabricated on the polymer is approximately 5 μm with fabrication error of ±20% and the width of core of the silicon waveguide (SiWG) array fabricated on the silicon (Si) chip is approximately several hundred nm to 1 μm with fabrication error of ±30%.
12. The method according to claim 7 , wherein both the material of the core used to fabricate the core array by the photolithography process with the first mask and the material of the base layer used to fabricate the stub by the photolithography process with the second mask are selected from the same type polymer materials, such as acrylic, epoxy or polyimide, and wherein a developer and a rinse liquid used in the photolithography process with the first mask can be used again as it is as a developer and a rinse liquid used in the photolithography process with the second mask.