Controlling lateral two-dimensional electron hole gas HEMT in type III nitride devices using ion implantation through gray scale mask
A high electron mobility field effect transistor (HEMT) includes a two dimensional electron gas (2DEG) in the drift region between the gate and the drain that has a non-uniform lateral 2DEG distribution that increases in a direction in the drift region from the gate to the drain.
1. A method of fabricating a high electron mobility field effect transistor (HEMT), the method comprising:
forming a mask layer on a carrier supply layer, the mask layer configured to be aligned with a drift region from a gate to a drain, and configured to have a lateral variation that increases in a direction from the gate to the drain; and
implanting ions through the mask layer into the carrier supply layer.
2. The method claim 1 further comprising:
forming a channel carrier traveling layer on a substrate; and
forming a carrier supply layer on the channel carrier traveling layer.
3. The method of claim 1 wherein forming a mask layer on the carrier supply layer comprises:
forming a tapered section on the mask layer that has a thickness that increases in the direction from the gate to the drain by
using gray scale photolithography; and
etching the mask layer to form the tapered section.
4. The method of claim 1 wherein forming a mask layer on the carrier supply layer comprises:
coating the carrier supply layer with photoresist; and
opening windows in the photoresist of varying size wherein the size of the openings decrease in the direction from the gate to the drain.
5. The method of claim 1 wherein implanting ions comprises:
damaging a lattice of the carrier supply layer;
wherein the lattice damage decreases in a direction in the drift region from the gate to the drain.
6. The method of claim 5 wherein:
a substrate comprises silicon (Si), sapphire, silicon carbide (SiC), or bulk single crystal gallium nitride (GaN);
a channel carrier traveling layer on the substrate comprises a GaN layer; and
the carrier supply layer comprises a AlGaN layer on the channel carrier traveling layer.
7. The method of claim 6 further comprising:
forming a passivation layer over the AlGaN layer; and
forming a gate comprising the steps of:
forming a trench extending through the passivation layer and into the AlGaN layer; and
depositing a gate dielectric layer in the trench; and
forming gate metal on the gate dielectric.
8. The method of claim 7 wherein forming a trench extending through the passivation layer and into the AlGaN layer further comprises:
forming the trench to extend into the GaN layer.
9. The method of claim 7 wherein the lattice damage decreases in a direction in the drift region from the gate dielectric layer to the drain.
10. The method of claim 5 wherein damaging a lattice of the carrier supply layer further comprises:
forming a two dimensional electron gas (2DEG) in the drift region between the gate and the drain that has a non-uniform lateral 2DEG distribution that increases in a direction in the drift region from the gate to the drain.