Heterogeneous annealing method and device
View Patent ↗A method of integrating a first substrate having a first surface with a first insulating material and a first contact structure with a second substrate having a second surface with a second insulating material and a second contact structure. The first insulating material is directly bonded to the second insulating material. A portion of the first substrate is removed to leave a remaining portion. A third substrate having a coefficient of thermal expansion (CTE) substantially the same as a CTE of the first substrate is bonded to the remaining portion. The bonded substrates are heated to facilitate electrical contact between the first and second contact structures. The third substrate is removed after heating to provided a bonded structure with reliable electrical contacts.
1. A device, comprising:
a first element with a first direct metal bonding structure direct metal bonded to a second element with a second direct metal bonded structure;
said first element having a thickness that would cause distortion to the first element if heated to a temperature required to make direct metal connections;
a third element bonded to said first element configured to reduce said distortion to allow a direct connection between the first and second direct metal bonding structures; and
at least one of the first and second metal bonding structures comprises a thermally expanded metal contact.
2. A bonded structure, comprising:
a first element having a first surface with a first insulating material and a first contact structure, a portion of the first element being removed;
a second element having a second surface with a second insulating material and a second contact structure, the first insulating material being directly bonded to the second insulating material;
a third element having a coefficient of thermal expansion (CTE) substantially the same as a CTE of the first element directly bonded to the first element;
the first and second contact structures directly connected to each other; and
at least one of the first and second contacts comprising a thermally expanded metal contact.
3. The device recited in claim 2 , wherein the first and second contact structures comprise nickel, the first element comprises a GaN/sapphire substrate, the second element comprises a silicon CMOS substrate, and the third element comprises a silicon substrate.
4. The device recited in claim 2 , wherein the first element comprises a GaN/sapphire structure with sapphire substrate in the range of approximately 500-1000 micron thickness, and the second element comprises a silicon CMOS substrate of 500-750 micron thickness.
5. The device recited in claim 2 , wherein the first and second contact structures comprise copper, the first element comprises silicon oxide, and the second element comprises silicon oxide.
6. The device recited in claim 2 , wherein the first element and the second element have a difference in coefficient of thermal expansion of less than 0.5 ppm/° C.
7. The device recited in claim 2 , wherein the first and third elements have substantially the same coefficient of thermal expansion.
8. The device recited in claim 7 , wherein the second element has a coefficient of thermal expansion different from the first and third elements.
9. The device recited in claim 2 , comprising:
the third element having a coefficient of thermal expansion different from the CTE of the first element in a range of 0.3 to 1.0 ppm/° C.
10. The device recited in claim 2 , comprising:
the third element having a coefficient of thermal expansion different from the CTE of the first element by less than about 0.3 ppm/° C.
11. The device recited in claim 2 , comprising:
the third element having a coefficient of thermal expansion different from the CTE of the first element by less than about 0.5 ppm/° C.
12. The device recited in claim 2 , comprising:
the third element having a coefficient of thermal expansion different from the CTE of the first element by less than about 1.0 ppm/° C.
13. The device recited in claim 2 , wherein at least one of the first and second contact structures is one of copper and nickel.
14. The device recited in claim 2 , comprising:
at least one of the first and second contact structures having a surface 0-10 nm below a surface of the respective first and second insulating materials.
15. The device recited in claim 2 , comprising:
the third material having a thickness in a range of about 0.1-1 nm.
16. The device recited in claim 2 , comprising:
the third material having a thickness in a range of about 1-10 nm.
17. The device recited in claim 2 , comprising:
the third material having a thickness in a range of about 10-100 nm.
18. The device recited in claim 2 , comprising:
the third material having a thickness in a range of about 2-20 nm.
19. The device recited in claim 2 , comprising:
a via filled with conductive material connected to at least one of the first and second contact structures.
20. The device recited in claim 19 , comprising:
the via exposed on a surface of one said first and second materials.
21. The device recited in claim 2 , wherein at least one of said first and second contact structures comprises a direct metal bonding structure.
22. The device recited in claim 2 , wherein the first element has a thickness in a range of 1-10 microns.
23. The device recited in claim 2 , wherein the first element has a thickness in a range of 10-100 microns and a coefficient of thermal expansion less than 2 ppm/° C. than the CTE of the second material.