IP Library Granted Patent US 8,901,722
Granted Patent B2
US 8,901,722 · App. 14/077,205 · Granted Dec 2, 2014

Semiconductor device with integral heat sink

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Quick Facts
Patent No.
US 8,901,722
App. No.
14/077,205
Granted
Dec 2, 2014
Kind
B2
Abstract

A packaged semiconductor device has opposing first and second main surfaces and a sidewall connecting the first and second main surfaces. A semiconductor die is embedded in the package and has a first main surface facing the first main surface of the package and an opposing second main surface facing the second main surface of the package. Conductive leads are electrically coupled to the semiconductor die, each of which is partially embedded within the package and extends outside of the package from the package sidewall. At least one tie bar is partially embedded within the package and has an exposed segment extending outside of the package from the sidewall. A portion of the exposed segment is in contact with the first main surface of the package. The tie bar forms a heat sink to dissipate heat generated by the semiconductor die.

Claims (32)

1. A semiconductor device, comprising:

a package having opposing first and second main surfaces and a sidewall connecting the first and second main surfaces;

a semiconductor die embedded in the package and having a first main surface facing the first main surface of the package and an opposing second main surface facing the second main surface of the package;

a plurality of conductive leads electrically coupled to the semiconductor die, each of which is partially embedded within the package and extends outside of the package from the sidewall thereof; and

at least one tie bar partially embedded within the package and having an exposed segment extending outside of the package from the sidewall, a portion of the exposed segment being in contact with the first main surface of the package, wherein the at least one tie bar forms a heat sink to conduct heat generated by the semiconductor die.

2. The semiconductor device of claim 1 , wherein the portion of the exposed segment in contact with the first main surface of the package is fixedly attached to the first main surface of the package.

3. The semiconductor device of claim 2 , further comprising an adhesive configured to fixedly attach the portion of the exposed segment to the first main surface of the package.

4. The semiconductor device of claim 1 , wherein the sidewall of the package forms a plurality of corners, and wherein a tie bar is located at each of the plurality of corners.

5. The semiconductor device of claim 1 , wherein the exposed segment of the at least one tie bar includes a first portion having a first width and a second portion having a second width, the first width being greater than the second width.

6. The semiconductor device of claim 1 , wherein the first main surface of the package includes a groove receiving the at least one tie bar.

7. A semiconductor device, comprising:

a package having opposing first and second main surfaces and a sidewall connecting the first and second main surfaces;

a semiconductor die embedded in the package and having a first main surface facing the first main surface of the package and an opposing second main surface facing the second main surface of the package;

a plurality of conductive leads electrically coupled to the semiconductor die, each of which is partially embedded within the package and extends outside of the package from the sidewall thereof; and

at least one tie bar partially embedded within the package and having an exposed segment extending outside of the package from the sidewall, a portion of the exposed segment being in contact with and fixedly attached to the first main surface of the package, wherein the at least one tie bar forms a heat sink to conduct heat generated by the semiconductor die.

8. The semiconductor device of claim 7 , wherein the sidewall of the package forms a plurality of corners, and a tie bar is located at each of the plurality of corners.

9. The semiconductor device of claim 7 , wherein the exposed segment of the at least one tie bar includes a first portion having a first width and a second portion having a second width, the first width being greater than the second width.

10. The semiconductor device of claim 7 , wherein the first main surface of the package includes a groove receiving the at least one tie bar.

11. A method of assembling a semiconductor device, the method comprising:

providing a lead frame having a plurality of conductive leads and coupled to a support by at least one tie bar;

electrically coupling a semiconductor die to each of the plurality of conductive leads on the lead frame;

embedding the semiconductor die, a portion of the at least one tie bar, and portions of the plurality of conductive leads in a packaging material to form a package having a first main surface, an opposing second main surface, and a sidewall connecting the first and second main surfaces, the plurality of conductive leads and the at least one tie bar extending outside of the package through the sidewall thereof;

severing the at least one tie bar from the support; and

bending an exposed segment of the at least one tie bar until a portion of the exposed segment is in contact with the first main surface of the package, wherein the at least one tie bar forms a heat sink to conduct heat generated by the semiconductor die.

12. The method of claim 11 , further comprising fixedly attaching, to the first main surface of the package, the portion of the exposed segment of the at least on tie bar in contact with the first main surface of the package.

13. The method of claim 12 , wherein the step of fixedly attaching comprises applying an adhesive between the first main surface of the package and the portion of the exposed segment of the at least one tie bar in contact with the first main surface of the package.

14. The method of claim 11 further comprising shaping the exposed segment of the at least one tie bar.

15. The method of claim 14 , wherein the shaping occurs simultaneously with or after the severing of the at least one tie bar from the support.

16. The method of claim 14 , wherein the exposed segment of the at least tie bar is shaped to have a first portion having a first width and a second portion having a second width, the first width being greater than the second width.

17. The method of claim 11 , further comprising forming a groove in the first main surface of the package.

18. The method of claim 17 , wherein the contact of the portion of the exposed segment of the at least one tie bar is made with the first main surface of the package in the groove.

19. The method of claim 11 , wherein the lead frame includes four tie bars, and the step of embedding includes forming corners in the sidewall of the package such that each corner is located proximate one of the four tie bars.

Assignments (22)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040632 FRAME: 0001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Sep 21, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 044209/0047 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040632/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE FILING AND REMOVE APPL. NO. 14085520 REPLACE IT WITH 14086520 PREVIOUSLY RECORDED AT REEL: 037515 FRAME: 0390. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Mar 1, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037926/0642 →
CORRECTIVE ASSIGNMENT OF INCORRECT PATENT APPLICATION NUMBER 14085520 ,PREVIOUSLY RECORDED AT REEL: 037458 FRAME: 0399. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 11, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037785/0454 →
CORRECTIVE ASSIGNMENT OF INCORRECT NUMBER 14085520 PREVIOUSLY RECORDED AT REEL: 037458 FRAME: 0420. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTON OF SECURITY INTEREST IN PATENTS. Recorded Feb 11, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037785/0568 →
CORRECTIVE ASSIGNMENT OF INCORRECT APPL. NO. 14/085,520 PREVIOUSLY RECORDED AT REEL: 037515 FRAME: 0390. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 11, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037792/0227 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT APPL. NO. 14/085,520 PREVIOUSLY RECORDED AT REEL: 037515 FRAME: 0420. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 11, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037879/0581 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME PREVIOUSLY RECORDED ON REEL 037458 FRAME 0420. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Jan 14, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037515/0420 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME PREVIOUSLY RECORDED ON REEL 037458 FRAME 0399. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Jan 14, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037515/0390 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 7, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FOUNDING, INC.
Reel/Frame 037458/0420 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 7, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FOUNDING, INC.
Reel/Frame 037458/0399 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0790 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Mar 13, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 032445/0493 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Mar 13, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 032445/0577 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Mar 13, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., COLLATERAL AGENT
Reel/Frame 032445/0689 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 11, 2013
From: GE, YOU; LYE, MENG KONG; MEI, PENGLIN
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 031579/0344 →