IP Library › Granted Patent US 9,117,792
Granted Patent B2
US 9,117,792 · App. 14/082,851 · Granted Aug 25, 2015

Chip thermal dissipation structure

Inventor: Chih-kuang Yang (Hsinchu, TW)
Assignee: PRINCO MIDDLE EAST FZE
H01L23/3675H01L23/36H01L2224/16H01L2224/73204H01L2924/15311
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Quick Facts
Patent No.
US 9,117,792
App. No.
14/082,851
Granted
Aug 25, 2015
Kind
B2
Abstract

Disclosed is a chip thermal dissipation structure, employed in an electronic device comprising a first chip having a first chip face and a first chip back, comprising chip molding material, covering a lateral of the first chip; a first case, contacting the first chip back; a packaging substrate, connecting with the first chip face via first bumps; and a print circuit board, having a first surface and a second surface and connecting with the packaging substrate via solders. The chip thermal dissipation structure further comprises a second case, contacting the second surface. The thermal energy generated by the first chip is conducted toward the first case via the first chip back and toward the second case via the first chip face, the first bumps, the packaging substrate, the solders and the print circuit board.

Claims (15)

1. A chip thermal dissipation structure, employed in an electronic device, comprising:

a first chip located inside the electronic device, having a first chip face and a first chip back;

chip molding material, covering a lateral of the first chip;

a first outer metal case of the electronic device separating an external environment outside the electronic device and an inner environment inside the electronic device, the first outer case encompassing an inner space of the electronic device, the first outer case contacting with the external environment at a first side thereof, and the first outer case at a second side opposite to the first side comprising a downward protrusion in position corresponding to the first chip back of the first chip to directly contact the first chip back;

a packaging substrate, connecting with the first chip face of the first chip via a plurality of first bumps;

a print circuit board, having a first surface and a second surface and connecting with the packaging substrate at the first surface via a plurality of solders; a second outer metal case, directly contacting the second surface of the print circuit board in position corresponding to the first chip, and wherein the second outer case comprises an upward protrusion in position corresponding to the first chip to directly contact the second surface of the print circuit board.

2. A chip thermal dissipation structure according to claim 1 , wherein the packaging substrate comprises a plurality of dielectric layers, and a thickness of each dielectric layer is less than 30 μm.

3. A chip thermal dissipation structure according to claim 1 , further comprising a second chip located inside the electronic device, having a second chip face and a second chip back, and the chip molding material covering a lateral of the second chip.

4. A chip thermal dissipation structure according to claim 3 , further comprising a junction temperature of the second chip being lower than a junction temperature of the second chip under circumstance that the second outer case does not contact the print circuit board in position corresponding to the second chip.

5. A chip thermal dissipation structure to claim 3 , wherein the packaging substrate connects with the second chip face of the second chip via a plurality of second bumps.

6. A chip thermal dissipation structure according to claim 3 , wherein the first outer case further contacts the second chip back of the second chip.

7. A chip thermal dissipation structure according to claim 3 , further comprising the second outer case, contacting the second surface of the print circuit board partially in position corresponding to the second chip.

8. A chip thermal dissipation structure according to claim 3 , wherein the chip molding material has a slit in between the first chip and second chip.

9. A chip thermal dissipation structure according to claim 1 , wherein a junction temperature of the first chip is lower than a junction temperature of the first chip under circumstance that the second outer case does not contact the print circuit board in position corresponding to the first chip.

10. A chip thermal dissipation structure according to claim 1 , wherein the second outer case maintains contact with the second surface of the print circuit board via a second heat-conducting material.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 30, 2020
From: PRINCO MIDDLE EAST FZE
To: PRINCO CORP.
Reel/Frame 054228/0040 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 18, 2013
From: YANG, CHIH-KUANG
To: PRINCO MIDDLE EAST FZE
Reel/Frame 031622/0723 →
Priority Claims (1)
TW 101147925 A · Dec 17, 2012 · national
Continuity (1)
Related Publication 20140167244A1 · Jun 19, 2014