Early de-allocation of write buffer in an SSD
View Patent ↗A data storage system includes: non-volatile solid state memory including non-volatile storage units and a temporary register; a data storage controller configured to receive a write command including a plurality of logical segments of data from a host; a write buffer allocated to receive a portion of the plurality of logical segments of data and accumulate a physical segment of data corresponding to a write unit of the solid state memory; a solid state memory controller configured to transmit the accumulated data from the write buffer to the temporary storage register each time the write buffer accumulates a physical segment of data. The data storage controller acknowledges completion of the write command to the host after the last logical segment of data is written to the write buffer; and deallocates the write buffer after the solid state memory completes reception of the accumulated data into the temporary storage register.
1. A data storage system, comprising:
non-volatile solid state memory comprising non-volatile storage units and a temporary register;
a data storage controller configured to receive a write command including a plurality of logical segments of data from a host;
a write buffer allocated by the controller to receive a portion of the plurality of logical segments of data and accumulate a physical segment of data corresponding to a write unit of the solid state memory; and
a solid state memory controller coupled to the non-volatile solid state memory, the solid state memory controller configured to transmit the accumulated data from the write buffer to the temporary storage register in the solid state memory each time the write buffer accumulates a physical segment of data,
wherein the data storage controller is further configured to:
acknowledge completion of the write command to the host after the last logical segment of data is written to the write buffer; and
deallocate the write buffer after the solid state memory completes reception of the accumulated data from the write buffer into the temporary storage register.
2. The data storage system of claim 1 , wherein the solid state memory is further configured to, after receiving the data from the write buffer into the temporary register, program the data from the temporary register to a memory unit in the solid state memory.
3. The data storage system of claim 2 , wherein the data storage controller is further configured to, in response to a data programming status from the solid state memory indicating unsuccessful data programming, initiate a data recovery procedure to recover the unsuccessfully programmed data.
4. An apparatus for controlling a buffer, the apparatus comprising:
a solid state drive controller configured to receive a write command including a plurality of logical segments of data from a host; and
a buffer allocated by the solid state drive controller to receive a portion of the plurality of logical segments of data and accumulate a physical segment of data corresponding to a write unit of a nonvolatile solid state memory coupled to the apparatus;
wherein the solid state memory comprises a temporary register configured to receive the accumulated data from the buffer each time the buffer accumulates a physical segment of data, and
wherein the solid state drive controller is configured to:
acknowledge completion of the write command to the host after the last logical segment of data is written to the buffer; and
deallocate the buffer after the solid state memory temporary register completes reception of the accumulated data from the buffer.
5. The apparatus of claim 4 , wherein the solid state memory is further configured to:
after receiving the data from the buffer into the temporary register, program the data from the temporary register to a memory unit in the solid state memory; and
transmit a data programming status signal to a front end of the solid state drive controller,
wherein in response to the data programming status signal from the solid state memory indicating unsuccessful data programming, the solid state drive controller initiates data recovery procedures to recover the unsuccessfully programmed data.
6. A method of controlling a buffer, the method comprising:
receiving a write command including a plurality of logical segments of data from a host;
allocating the buffer to receive a portion of the plurality of logical segments of data;
transferring each logical segment of data to the buffer;
accumulating in the buffer a predetermined physical segment of data corresponding to a write unit of a non-volatile solid state memory;
transferring the accumulated data from the buffer to a register in the solid state memory via a solid state memory controller for temporary storage each time the buffer accumulates the predetermined physical segment of data;
acknowledging completion of the write command to the host after the last logical segment of data is written to the buffer; and
deallocating the buffer after the data transfer from the buffer to the solid state memory register is complete.
7. The method of claim 6 , further comprising:
writing the accumulated data temporarily stored in the solid state memory register to a memory unit of the solid state memory;
determining whether the accumulated data is successfully written to the solid state memory unit; and
transmitting a data programming status signal from the solid state memory to the solid state memory controller.
8. The method of claim 7 , wherein in response to a data programming status signal from the solid state memory indicating that the data is unsuccessfully written to memory, performing data recovery procedures to recover the unsuccessfully programmed data.
9. The method of claim 7 , wherein the memory is a flash memory and the predetermined physical segment of data is a physical segment of data comprising a flash memory page of data.