IP Library Granted Patent US 9,263,420
Granted Patent B2
US 9,263,420 · App. 14/097,424 · Granted Feb 16, 2016

Devices and stacked microelectronic packages with package surface conductors and methods of their fabrication

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Quick Facts
Patent No.
US 9,263,420
App. No.
14/097,424
Granted
Feb 16, 2016
Kind
B2
Abstract

Embodiments of methods for forming a device include performing an oxidation inhibiting treatment to exposed ends of first and second device-to-edge conductors, and forming a package surface conductor to electrically couple the exposed ends of the first and second device-to-edge conductors. Performing the oxidation inhibiting treatment may include applying an organic solderability protectant coating to the exposed ends, or plating the exposed ends with a conductive plating material. The method may further include applying a conformal protective coating over the package surface conductor. An embodiment of a device formed using such a method includes a package body, the first and second device-to-edge conductors, the package surface conductor on a surface of the package body and extending between the first and second device-to-edge conductors, and the conformal protective coating over the package surface conductor.

Claims (21)

1. A method comprising:

performing an oxidation inhibiting treatment to a first exposed end of a first device-to-edge conductor that is exposed at a sidewall of a microelectronic package and to a second exposed end of a second device-to-edge conductor that is exposed at a sidewall of a microelectronic package; and

forming a package surface conductor over the sidewall to electrically couple the first device-to-edge conductor and the second device-to-edge conductor.

2. The method of claim 1 , wherein performing the oxidation inhibiting treatment is selected from applying an organic solderability protectant coating to the first and second exposed ends, and plating the first and second exposed ends with a conductive plating material.

3. The method of claim 1 , wherein forming the package surface conductor comprises dispensing one or more conductive materials between the first and second exposed ends using one or more dispensing methods selected from spraying, inkjet printing, aerosol jet printing, stencil printing, and needle dispense.

4. The method of claim 1 , wherein the package surface conductor is formed from one or more conductive materials that are selected from an electrically conductive adhesive, conductive polymer, a polymer filled with conductive particles, a metal alloy, metal coated organic particles, metal coated ceramic particles, solder paste, solder-filled adhesive, nanoparticle-filled ink, a liquid metal, a metal-containing adhesive, a metal-containing epoxies, electrically-conductive pastes, indium, and bismuth.

5. The method of claim 1 , wherein the first device-to-edge conductor is included within a first layer that is proximate a top surface of a microelectronic package, and the second device-to-edge conductor is included within a second layer that is proximate a bottom surface of the microelectronic package, and wherein the package surface conductor is a top-side-to-bottom-side package surface conductor.

6. The method of claim 1 , wherein the first device-to-edge conductor is included within a first layer that is proximate a first surface of a microelectronic package, and the second device-to-edge conductor is included within a second layer that is proximate the first surface of the microelectronic package, and wherein the package surface conductor is an inter-layer package surface conductor.

7. The method of claim 1 , further comprising:

forming a package body by stacking a first microelectronic package that has a first sidewall on a second microelectronic package that has a second sidewall, wherein the first sidewall forms a first portion of a surface of the package body, the second sidewall forms a second portion of the surface, the first microelectronic package includes an embedded first microelectronic device that is electrically coupled with the first device-to-edge conductor, the second microelectronic package includes an embedded second microelectronic device that is electrically coupled with the second device-to-edge conductor, and the package surface conductor is formed on the surface of the package body.

8. The method of claim 7 , wherein the package surface conductor is an inter-package package surface conductor.

9. The method of claim 1 , further comprising:

applying a conformal protective coating over the package surface conductor.

10. The method of claim 9 , wherein the conformal protective coating is selected from silicone, urethane, and parylene.

11. A method comprising:

performing an oxidation inhibiting treatment to a first exposed end of a first device-to-edge conductor of that is exposed at a sidewall of a microelectronic package and to a second exposed end of a second device-to-edge conductor that is exposed at a sidewall of a microelectronic package by applying an organic solderability protectant coating to the first and second exposed ends; and

forming a package surface conductor over the sidewall to electrically couple the first device-to-edge conductor and the second device-to-edge conductor; and

applying a conformal protective coating over the package surface conductor.

12. The method of claim 11 , wherein the conformal protective coating is selected from silicone, urethane, and parylene.

13. The method of claim 11 , wherein forming the package surface conductor is selected from forming a top-side-to-bottom-side package surface conductor, forming an inter-layer package surface conductor, and forming an inter-package package surface conductor.

14. The method of claim 11 , wherein the package surface conductor is formed from one or more conductive materials selected from an electrically conductive adhesive, conductive polymer, a polymer filled with conductive particles, a metal alloy, metal coated organic particles, metal coated ceramic particles, solder paste, solder-filled adhesive, nanoparticle-filled ink, a liquid metal, a metal-containing adhesive, a metal-containing epoxies, electrically-conductive pastes, indium, and bismuth.

Assignments (22)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040632 FRAME: 0001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Sep 21, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 044209/0047 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040632/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE FILING AND REMOVE APPL. NO. 14085520 REPLACE IT WITH 14086520 PREVIOUSLY RECORDED AT REEL: 037515 FRAME: 0390. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Mar 1, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037926/0642 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT APPL. NO. 14/085,520 PREVIOUSLY RECORDED AT REEL: 037515 FRAME: 0420. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 11, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037879/0581 →
CORRECTIVE ASSIGNMENT OF INCORRECT NUMBER 14085520 PREVIOUSLY RECORDED AT REEL: 037458 FRAME: 0420. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTON OF SECURITY INTEREST IN PATENTS. Recorded Feb 11, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037785/0568 →
CORRECTIVE ASSIGNMENT OF INCORRECT PATENT APPLICATION NUMBER 14085520 ,PREVIOUSLY RECORDED AT REEL: 037458 FRAME: 0399. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 11, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037785/0454 →
CORRECTIVE ASSIGNMENT OF INCORRECT APPL. NO. 14/085,520 PREVIOUSLY RECORDED AT REEL: 037515 FRAME: 0390. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 11, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037792/0227 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME PREVIOUSLY RECORDED ON REEL 037458 FRAME 0420. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Jan 14, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037515/0420 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME PREVIOUSLY RECORDED ON REEL 037458 FRAME 0399. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Jan 14, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037515/0390 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 7, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FOUNDING, INC.
Reel/Frame 037458/0420 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 7, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FOUNDING, INC.
Reel/Frame 037458/0399 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0790 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Mar 13, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., COLLATERAL AGENT
Reel/Frame 032445/0689 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Mar 13, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 032445/0577 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Mar 13, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 032445/0493 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 5, 2013
From: VINCENT, MICHAEL B.; HAYES, SCOTT M.
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 031721/0117 →