IP Library Granted Patent US 9,190,400
Granted Patent B2
US 9,190,400 · App. 14/135,006 · Granted Nov 17, 2015

Method and system for heterogeneous substrate bonding for photonic integration

Inventors: Stephen B. Krasulick (Albuquerque, NM); John Dallesasse (Geneva, IL)
Assignee: Skorpios Technologies, Inc.
H01L25/50H01L25/167H01S5/02272H01L33/0079H01L33/44H01L33/486H01L33/62H01L2924/0002H01S5/021
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Quick Facts
Patent No.
US 9,190,400
App. No.
14/135,006
Granted
Nov 17, 2015
Kind
B2
Abstract

A method of fabricating a composite integrated optical device includes providing a substrate comprising a silicon layer, forming a waveguide in the silicon layer, and forming a layer comprising a metal material coupled to the silicon layer. The method also includes providing an optical detector, forming a metal-assisted bond between the metal material and a first portion of the optical detector, forming a direct semiconductor-semiconductor bond between the waveguide, and a second portion of the optical detector.

Claims (33)

1. A method of fabricating a hybrid integrated optical device, the method comprising:

providing a substrate comprising a silicon layer;

providing a compound semiconductor device;

forming a bonding region disposed between the silicon layer and the compound semiconductor device, wherein the bonding region comprises:

a metal-semiconductor bond at a first portion of the bonding region, wherein the metal-semiconductor bond includes a first pad bonded to the silicon layer, a bonding metal bonded to the first pad, and a second pad bonded to the bonding metal and the compound semiconductor device; and

an interface assisted bond at a second portion of the bonding region, wherein the interface assisted bond includes an interface layer positioned between the silicon layer and the compound semiconductor device, wherein the interface assisted bond provides an ohmic contact between the silicon layer and the compound semiconductor device.

2. The method of claim 1 wherein the substrate comprises a silicon on insulator wafer including a silicon substrate, an oxide layer disposed on the silicon substrate, and the silicon layer disposed on the oxide layer.

3. The method of claim 1 wherein the compound semiconductor device comprises an InP semiconductor laser.

4. The method of claim 3 wherein the second portion of the bonding region is substantially free from the interface layer at a position adjacent an active region of the InP semiconductor laser.

5. The method of claim 1 wherein the first pad and the second pad comprise at least one of Ti or Au.

6. The method of claim 1 wherein the interface layer comprises In x Pd y .

7. The method of claim 6 wherein x=0.7 and y=0.3.

8. The method of claim 1 wherein a thickness of the interface layer is less than 50 Å.

9. The method of claim 1 wherein forming the bonding region disposed between the silicon layer and the compound semiconductor device comprises performing a bonding process at a temperature ranging from about 350° C. to about 500° C.

10. The method of claim 9 wherein the temperature ranges from about 400° C. to about 450° C.

11. A method of fabricating a composite integrated optical device, the method comprising:

providing a substrate comprising a silicon layer;

forming a waveguide in the silicon layer;

forming a layer comprising a metal material coupled to the silicon layer;

providing an optical detector;

forming a metal-assisted bond between the metal material and a first portion of the optical detector; and

forming a direct semiconductor-semiconductor bond between the waveguide and a second portion of the optical detector.

12. The method of claim 11 wherein the substrate comprises a silicon on insulator wafer including a silicon substrate, an oxide layer disposed on the silicon substrate, and

the silicon layer disposed on the oxide layer.

13. The method of claim 11 wherein the optical detector comprises an APD receiver.

14. The method of claim 13 wherein forming the layer comprising the metal material comprises:

depositing the metal material; and

patterning the metal material to expose the silicon layer in a predetermined spatial pattern.

15. The method of claim 11 wherein the metal material comprises In x Pd y .

16. The method of claim 15 wherein x=0.7 and y=0.3.

17. The method of claim 11 wherein a thickness of the metal material is less than 100 Å.

18. The method of claim 11 wherein forming the metal-assisted bond and forming the direct semiconductor-semiconductor bond comprises performing a bonding process at a temperature ranging from about 350° C. to about 500° C.

19. The method of claim 18 wherein the temperature ranges from about 400° C. to about 450° C.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Nov 22, 2017
From: PACIFIC WESTERN BANK
To: SKORPIOS TECHNOLOGIES, INC.
Reel/Frame 044751/0469 →
SECURITY INTEREST Recorded Oct 23, 2017
From: SKORPIOS TECHNOLOGIES, INC.
To: PACIFIC WESTERN BANK
Reel/Frame 044272/0557 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 7, 2015
From: KRASULICK, STEPHEN B.; DALLESASSE, JOHN
To: SKORPIOS TECHNOLOGIES, INC.
Reel/Frame 036503/0291 →
Continuity (3)
Division 12902621 · Oct 12, 2010
Provisional Application 61251132 · Oct 13, 2009
Related Publication 20140179036A1 · Jun 26, 2014