IP Library Granted Patent US 9,311,212
Granted Patent B2
US 9,311,212 · App. 14/141,594 · Granted Apr 12, 2016

Task based voting for fault-tolerant fail safe computer systems

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Quick Facts
Patent No.
US 9,311,212
App. No.
14/141,594
Granted
Apr 12, 2016
Kind
B2
Abstract

A system includes a first application that writes a first plurality of tasks to a first memory buffer; a second memory buffer that receives a copy of the first plurality of tasks; a second application that writes a second plurality of tasks to a third memory buffer; and a fourth memory buffer that receives a copy of the second plurality of tasks. The system further includes a first comparison module that generates a first voting signal based on a first comparison between a first task and a second task. The system further includes a second comparison module that generates a second voting signal based on a second comparison between the first task and the second task. The system further includes a first central processing unit (CPU) that selectively determines whether to de-assert a module health signal based on the first voting signal and the second voting signal.

Claims (36)

1. A system comprising:

a first application that, during a first clock cycle, writes a first plurality of tasks to a first memory buffer;

a second memory buffer that, during a second clock cycle, receives a copy of the first plurality of tasks;

a second application that, during the first clock cycle, writes a second plurality of tasks to a third memory buffer;

a fourth memory buffer that, during the second clock cycle, receives a copy of the second plurality of tasks;

a first comparison module that i) receives a first task from the first plurality of tasks and a second task from the second plurality of tasks and ii) selectively generates a first voting signal based on a first comparison between the first task and the second task;

a second comparison module that i) receives the first task from the first plurality of tasks and the second task from the second plurality of tasks and ii) selectively generates a second voting signal based on a second comparison between the first task and the second task: and

a first central processing unit (CPU) that selectively determines whether to de-assert a module health signal based on the first voting signal and the second voting signal.

2. The system of claim 1 wherein the first CPU determines not to de-assert the module health signal in response to receiving the first voting signal and the second voting signal.

3. The system of claim 1 wherein the first CPU determines to de-assert the module health signal in response to not receiving the first voting signal.

4. The system of claim 1 wherein the first CPU determines to de-assert the module health signal in response to not receiving the second voting signal.

5. The system of claim 1 wherein the first comparison module determines whether the first task and the second task are identical.

6. The system of claim 5 wherein the first comparison module generates the first voting signal when the first comparison module determines the first task and the second task are identical.

7. The system of claim 5 wherein the first comparison module does not generate the first voting signal when the first comparison module determines the first task and the second task are not identical.

8. The system of claim 1 wherein the second comparison module determines whether the first task is identical to the second task.

9. The system of claim 8 wherein the second comparison module generates the second voting signal when the second comparison module determines the first task and the second task are identical.

10. The system of claim 8 wherein the second comparison module does not generate the second voting signal when the second comparison module determines the first task and the second task are not identical.

11. A method comprising:

writing, during a first clock cycle, a first plurality of tasks;

copying, during a second clock cycle, the first plurality of tasks;

writing, during the first clock cycle, a second plurality of tasks;

copying, during the second clock cycle, the second plurality of tasks;

receiving a first task from the first plurality of tasks;

receiving a second task from the second plurality of tasks;

selectively generating a first voting signal based on a first comparison between the first task and the second task;

selectively generating a second voting signal based on a second comparison between the first task and the second task;

selectively determining whether de-assert a module health signal based on the first voting signal and the second voting signal.

12. The method of claim 11 further comprising determining not to de-assert the module health signal in response to receiving the first voting signal and the second voting signal.

13. The method of claim 11 further comprising determining to de-assert the module health signal in response to not receiving the first voting signal.

14. The method of claim 11 further comprising determining to de-assert the module health signal in response to not receiving the second voting signal.

15. The method of claim 11 further comprising determining whether the first task and the second task are identical based on the first comparison.

16. The method of claim 15 further comprising determining to generate the first voting signal based on a determination that the first task and the second task are identical.

17. The method of claim 15 further comprising determining to not to generate the first voting signal based on a determination that the first task and the second task are not identical.

18. The method of claim 11 further comprising determining whether the first task and the second task are identical based on the second comparison.

19. The method of claim 18 further comprising determining to generate the second voting signal based on a determination that the first task and the second task are identical.

20. The method of claim 18 further comprising determining not to generate the second voting signal based on a determination that the first task and the second task are not identical.

Assignments (10)
PATENT SECURITY AGREEMENT Recorded Jun 30, 2025
From: CREELED, INC.; PENGUIN SOLUTIONS CORPORATION (DE); SMART EMBEDDED COMPUTING, INC.; SMART HIGH RELIABILITY SOLUTIONS LLC; SMART MODULAR TECHNOLOGIES, INC.; PENGUIN COMPUTING, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 071755/0001 →
RELEASE OF PATENT SECURITY INTEREST RECORDED AT R/F 058983/0001 Recorded Jun 25, 2025
From: CITIZENS BANK, N.A.
To: SMART MODULAR TECHNOLOGIES, INC.; SMART EMBEDDED COMPUTING, INC.; SMART HIGH RELIABILITY SOLUTIONS LLC; CREELED, INC.
Reel/Frame 071725/0207 →
RELEASE OF SECURITY INTEREST Recorded Feb 7, 2022
From: BANK OF AMERICA, N.A., AS AGENT
To: SMART EMBEDDED COMPUTING, INC.
Reel/Frame 058913/0097 →
RELEASE OF SECURITY INTEREST AT REEL 050471 FRAME 0912 Recorded Feb 7, 2022
From: BARCLAYS BANK PLC
To: SMART EMBEDDED COMPUTING, INC.
Reel/Frame 058961/0005 →
SECURITY INTEREST Recorded Feb 7, 2022
From: SMART MODULAR TECHNOLOGIES, INC.; SMART HIGH RELIABILITY SOLUTIONS, LLC; SMART EMBEDDED COMPUTING, INC.; CREELED, INC.
To: CITIZENS BANK, N.A.
Reel/Frame 058983/0001 →
SECURITY INTEREST Recorded Dec 23, 2020
From: SMART EMBEDDED COMPUTING INC.
To: BANK OF AMERICA, N.A., AS AGENT
Reel/Frame 054739/0137 →
CHANGE OF NAME Recorded Jun 24, 2020
From: ARTESYN EMBEDDED COMPUTING, INC.
To: SMART EMBEDDED COMPUTING, INC.
Reel/Frame 053023/0953 →
SECURITY AGREEMENT Recorded Sep 24, 2019
From: SMART EMBEDDED COMPUTING, INC.
To: BARCLAYS BANK PLC
Reel/Frame 050471/0912 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 13, 2015
From: VAANANEN, PASI JUKKA PETTERI; CORNES, MARTIN PETER JOHN
To: ARTESYN EMBEDDED COMPUTING, INC.
Reel/Frame 037030/0614 →
CHANGE OF NAME Recorded Nov 13, 2015
From: EMERSON NETWORK POWER - EMBEDDED COMPUTING INC.
To: ARTESYN EMBEDDED COMPUTING, INC.
Reel/Frame 037111/0124 →