Integrated circuit package and method of making the same
View Patent ↗Packages for an integrated circuit die and methods and lead frames for making such packages are disclosed. The package includes a die, a die pad, peripheral metal contacts, bond wares, and an encapsulant. The die pad and contacts are located at a lower surface of the package. The die pad and the contacts have side surfaces which include reentrant portions and asperities to engage the encapsulant.
1. A semiconductor device comprising:
a metal die pad comprising a top planar surface, a bottom planar surface opposite the top planar surface, and at least four sides between the top and bottom planar surfaces;
a semiconductor die coupled to the top planar surface of the metal die pad;
a plurality of metal members, each comprising:
a top surface;
a bottom surface;
a curved side surface; and
a straight side surface opposite the curved side surface; and
an encapsulating material covering at least:
said semiconductor die;
the top planar surface and the at least four sides of said metal die pad; and
the top surface and the curved side surface of each of said plurality of metal members.
2. The semiconductor device of claim 1 , wherein each of said plurality of metal members comprises an anchor.
3. The semiconductor device of claim 1 , wherein the curved side surface of each of said plurality of metal members is semicircular-shaped.
4. The semiconductor device of claim 1 , wherein the curved side surface of each of said plurality of metal members is convex.
5. The semiconductor device of claim 1 , wherein for each of said plurality of metal members, the curved side surface faces away from said metal die pad, and the straight side surface faces said metal die pad.
6. The semiconductor device of claim 1 , wherein said metal die pad is positioned between a first metal member of said plurality of metal members and a second metal member of said plurality of metal members, and the first and second metal members are symmetric about said metal die pad.
7. The semiconductor device of claim 1 , wherein each of said plurality of metal members is connected to said metal die pad by a respective connector.
8. The semiconductor device of claim 1 , wherein each of said plurality of metal members comprises a lip extending from the curved side surface.
9. A semiconductor device comprising:
a metal die pad comprising a top planar surface, a bottom planar surface opposite the top planar surface, and at least four sides between the top and bottom planar surfaces;
a semiconductor die coupled to the top planar surface of the metal die pad;
a plurality of metal members, each comprising:
a top surface;
a bottom surface;
a curved side surface; and
a straight side surface; and
an encapsulating material covering at least:
said semiconductor die;
the top planar surface and the at least four sides of said metal die pad; and
the top surface and the curved side surface of each of said plurality of metal members,
wherein the straight side surface of each of said plurality of metal members is exposed by the encapsulating material.
10. The semiconductor device of claim 9 , wherein each of said plurality of metal members comprises an anchor.
11. The semiconductor device of claim 9 , wherein the straight side surface of each of said plurality of metal members is severed at a side surface of said encapsulating material.
12. The semiconductor device of claim 9 , wherein the curved side surface of each of said plurality of metal members is semicircular-shaped.
13. The semiconductor device of claim 9 , wherein the curved side surface of each of said plurality of metal members is convex.
14. The semiconductor device of claim 9 , wherein each of said plurality of metal members is connected to said metal die pad by a respective connector.
15. The semiconductor device of claim 9 , wherein each of said plurality of metal members comprises a lip extending from the curved side surface.
16. A semiconductor device comprising:
a metal die pad comprising a top planar surface, a bottom planar surface opposite the top planar surface, and at least four sides between the top and bottom planar surfaces;
a semiconductor die coupled to the top planar surface of the metal die pad;
a plurality of metal members, each comprising:
a top surface;
a bottom surface;
a first side surface that is curved;
a second side surface that is straight;
a third side surface extending between a first end of the second side surface and the first side surface; and
a fourth side surface extending between a second end of the second side surface and the first side surface; and
an encapsulating material covering at least:
said semiconductor die;
the top planar surface and the at least four sides of said metal die pad; and
the top surface, the first side surface, the third side surface, and the fourth side surface of each of said plurality of metal members,
wherein the second side surface of each of said plurality of metal members is exposed by the encapsulating material.
17. The semiconductor device of claim 16 , wherein each of said plurality of metal members comprises an anchor.
18. The semiconductor device of claim 16 , wherein the second side surface of each of said plurality of metal members is severed at a side surface of said encapsulating material.
19. The semiconductor device of claim 16 , wherein the first side surface of each of said plurality of metal members is semicircular-shaped.
20. The semiconductor device of claim 16 , wherein the first side surface of each of said plurality of metal members is convex.
21. The semiconductor device of claim 16 , wherein each of said plurality of metal members is connected to said metal die pad by a respective connector.
22. The semiconductor device of claim 16 , wherein for each of said plurality of metal members, the third and fourth side surfaces are straight and parallel to each other.
23. The semiconductor device of claim 16 , wherein each of said plurality of metal members comprises a lip extending from the first side surface.