Silicide protection during contact metallization and resulting semiconductor structures

1. A method, comprising:

providing a semiconductor structure for a transistor, the structure comprising a metal gate coupled to a channel region and a spacer of protective material on either side of the metal gate;

creating a first layer of protective material over a source region and a drain region of the transistor;

creating a second layer of protective material over the gate;

wherein the first protective layer acts as an etch stop for creating intermediate openings to the source region and the drain region, and wherein the first and second protective layers are configured to allow punch-through of the first protective layer while preventing etching through the second protective layer; and

creating silicide in the source region and the drain region after creating an intermediate gate opening and prior to fully etching a gate opening.

2. The method of claim 1 , wherein creating silicide prior to fully etching a gate opening comprises:

etching an intermediate opening to the gate by stopping on the second protective layer;

etching intermediate openings to the source region and the drain region by stopping on the first protective layer;

punching-through the first protective layer after etching the intermediate openings without etching through the second protective layer above the gate;

creating silicide for the source region and the drain region where exposed by punching-through the first protective layer thereabove;

etching through the second protective layer to create a gate opening; and

creating a contact in each of the source opening, the drain opening and the gate opening.

3. The method of claim 2 , wherein creating contacts in the source, drain and gate openings comprises:

lining inner surfaces of each of the openings with a liner material;

filling the lined openings of the source and drain regions with at least one first contact material; and

filling the lined opening of the gate with the at least one second contact material.

4. The method of claim 3 , wherein filling the lined gate opening is performed simultaneously with the lined source opening and the lined drain opening.

5. The method of claim 3 , wherein the at least one first contact material and the at least one second contact material comprise tungsten, and wherein filling all the lined openings comprises bottom-up growth of the tungsten.

6. The method of claim 1 , wherein creating silicide after creating an intermediate gate opening and prior to fully etching a gate opening comprises:

etching intermediate openings to the source region and the drain region of the transistor and stopping on the first protective layer;

punching-through the first protective layer after etching the intermediate openings without etching through the second protective layer above the gate;

creating silicide for the source region and the drain region where exposed by punching-through the first protective layer thereabove;

creating contacts in the source opening and the drain opening;

fully etching an opening to the gate after creating full source and drain contacts; and

creating a contact in the gate opening.

7. The method of claim 6 , wherein the first protective material comprises hafnium oxide, and wherein the second protective material comprises silicon nitride.

8. The method of claim 1 , wherein the second protective layer is thicker than the first protective layer.

9. The method of claim 1 , wherein the second protective layer is more etch resistant than the first protective layer.

10. A method, comprising:

providing a semiconductor structure for a transistor, the structure comprising a metal gate coupled to a channel region and a spacer of protective material on either side of the metal gate;

creating a first layer of protective material over a source region and a drain region of the transistor;

forming an interlayer dielectric material on either side of the spacers above the first layer of protective material;

depositing one or more dielectric materials above the gate and interlayer dielectric;

etching a source opening and a drain opening by first stopping on the first layer of protective material and then punching therethrough;

forming silicide in the source region and the drain region;

creating contacts in the source opening and the drain opening, wherein creating the source and drain contacts comprises:

lining inner surfaces of the source opening and the drain opening with a liner material;

filling the lined source and drain openings with the at least one first contact material;

partially recessing the liner and the first contact material;

bottom-up filling the source and drain openings with a second contact material; and

wherein the first and second contact material both comprise tungsten;

etching an opening to the gate after creating source and drain contacts; and

creating a contact in the gate opening.

11. The method of claim 10 , wherein creating the gate contact comprises:

lining inner surfaces of the gate opening with a liner material; and

filling the lined gate opening with the at least one first contact material.

12. The method of claim 11 , wherein the second contact material comprises tungsten.

13. The method of claim 10 , wherein creating the gate contact comprises bottom-up filling with a second contact material from underneath the metal gate.

14. The method of claim 13 , wherein the second contact material comprises tungsten.