Graphene structure
A method of forming graphene includes placing a substrate in a processing chamber and introducing a cleaning gas including hydrogen and nitrogen into the processing chamber. The method also includes introducing a carbon source into the processing chamber and initiating a microwave plasma in the processing chamber. The method further includes subjecting the substrate to a flow of the cleaning gas and the carbon source for a predetermined period of time to form the graphene.
1. A graphene structure comprising:
a copper substrate; and
a single monolayer of CMOS compatible graphene grown at a maximum temperature of 425° C. and disposed on the copper substrate and having an area measured in a unit of length squared, wherein the area is associated with a grain ranging in size between 100 μm and 300 μm and wherein the single monolayer of CMOS compatible graphene is characterized by a height variation measured in the unit of length such that a ratio of the height variation to the area is less than 2.5×10 −2 (per unit of length).
2. The graphene structure of claim 1 wherein the ratio of the height variation to the area is less than 1.25×10 −2 (per unit of length).
3. The graphene structure of claim 1 wherein the single monolayer of CMOS compatible graphene is characterized by a strain variation of less than 0.05%.
4. The graphene structure of claim 1 wherein the copper substrate comprises a single crystal copper substrate.
5. The graphene structure of claim 2 wherein the ratio of the height variation to the area is less than 1.0×10 −2 (per unit of length).
6. The graphene structure of claim 4 wherein the single crystal copper substrate comprises a single crystal (100) substrate.
7. The graphene structure of claim 4 wherein the single crystal copper substrate comprises a single crystal (111) substrate.
8. The graphene structure of claim 1 wherein the ratio of the height variation to the area is greater than 0.25×10 −2 (per unit of length).
9. The graphene structure of claim 1 wherein the unit of length is nanometers.
10. The graphene structure of claim 1 wherein the area is free of grain boundaries.
11. The graphene structure of claim 1 wherein the single monolayer of CMOS compatible graphene is characterized by a first Raman peak associated with a 2D-band mode and a second Raman peak associated with a G-band mode, wherein a ratio of the first Raman Peak to the second Raman peak is about three.
12. A graphene structure comprising:
a copper substrate; and
a single monolayer of CMOS compatible graphene disposed on the copper substrate, grown at a maximum temperature of 425° C., and having a measurement area less than or equal to 100 nm 2 , wherein the measurement area is associated with a grain ranging in size between 100 μm and 300 μm and wherein the single monolayer of CMOS compatible graphene is characterized by a height variation measured in nanometers such that a ratio of the height variation to the measurement area is less than 2.5×10 −2 per nanometer.
13. The graphene structure of claim 12 wherein the ratio of the height variation to the measurement area is less than 1.25×10 −2 per nanometer.
14. The graphene structure of claim 13 wherein the ratio of the height variation to the measurement area is less than 1.0×10 −2 per nanometer.
15. The graphene structure of claim 12 wherein the single monolayer of CMOS compatible graphene is characterized by a strain variation of less than 0.05%.
16. The graphene structure of claim 12 wherein the copper substrate comprises a single crystal copper substrate.
17. The graphene structure of claim 16 wherein the single crystal copper substrate comprises a single crystal (111) substrate.
18. The graphene structure of claim 16 wherein the single crystal copper substrate comprises a single crystal (100) substrate.