IP Library Granted Patent US 9,520,334
Granted Patent B2
US 9,520,334 · App. 14/155,007 · Granted Dec 13, 2016

Integrated structure with improved heat dissipation

Inventors: Laurent-Luc Chapelon (Domene, FR); Pascal Ancey (Revel, FR); Sandrine Lhostis (Theys, FR)
Assignees: STMICROELECTRONICS (CROLLES 2) SAS; STMICROELECTRONICS SA
H01L23/36H01L23/3128H01L23/4275H01L23/4334H01L23/481H01L25/0657H01L29/0657H01L2224/73204H01L2225/06513H01L2225/06517H01L2225/06541H01L2225/06555H01L2225/06589
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Quick Facts
Patent No.
US 9,520,334
App. No.
14/155,007
Granted
Dec 13, 2016
Kind
B2
Abstract

An integrated structure includes a support supporting at least one chip and a heat dissipating housing, attached to the chip. The housing is thermally conductive and has a thermal expansion compatible with the chip. The housing may further including closed cavities filled with a phase change material.

Claims (43)

1. An integrated structure, comprising:

integrated circuit chip having a semiconductor substrate; and

a heat dissipating housing attached to the integrated circuit chip, the heat dissipating housing comprising a body, the body formed of a semiconductor material that is thermally conductive and has a thermal expansion compatible with the semiconductor substrate.

2. The structure according to claim 1 , wherein the heat dissipating housing has a coefficient of thermal expansion in the range between 2 ppm·K −1 and 5 ppm·K −1 .

3. The structure according to claim 1 , wherein the heat dissipating housing has a Young's modulus in the range between 50 GPa and 190 GPa.

4. The structure according to claim 1 , wherein the heat dissipating housing has a thermal conductivity in the range between 100 W·m −1 ·K −1 and 300 W·m −1 ·K −1 .

5. The structure according to claim 1 , wherein the heat dissipating housing is configured for storing heat when electronic components of the integrated circuit chip are in operation and for releasing the heat stored when the electronic components are turned off.

6. The structure according to claim 5 , wherein the heat dissipating housing contains at least one phase-change material having a first phase change during which it stores heat and a second phase change during which it releases stored heat.

7. The structure according to claim 5 , wherein the heat dissipating housing possesses a storage capacity in latent heat in the range between 0.5 J and 3.5 J for a volume of housing of thickness 250 microns and a cross section equal to 1 cm 2 .

8. The structure according to claim 6 , wherein the body of the heat dissipating housing is made of silicon and defines at least one cavity closed by a cover made of silicon and containing the phase-change material.

9. The structure according to claim 8 , wherein the at least one cavity and an internal face of the cover are coated with a thermally conductive layer.

10. The structure according to claim 1 , wherein the heat dissipating housing is fixed into an open cavity of the integrated circuit chip formed on one of its faces.

11. The structure according to claim 1 , in which the heat dissipating housing is disposed between the at least one integrated circuit chip and a substrate while being in contact with the substrate.

12. The structure according to claim 11 , further comprising a thermally conductive layer situated at an interface between the body of the heat dissipating housing and the substrate.

13. The structure according to claim 1 , wherein the integrated circuit chip is situated between a substrate and the heat dissipating housing.

14. The structure according to claim 1 , further comprising another integrated circuit chip stacked on the integrated circuit chip on an opposite side from the heat dissipating housing.

15. The structure according to claim 1 , further comprising a radiator in contact with a face of the heat dissipating housing on an opposite side from the integrated circuit chip.

16. The structure of claim 1 wherein the semiconductor substrate is formed of the semiconductor material.

17. An integrated structure, comprising:

an integrated circuit chip including a semiconductor substrate having a front side with an interconnection network and a back side with a formed cavity; and

a heat dissipating structure attached to the integrated circuit chip within said cavity on the back side, the heat dissipating structure being thermally conductive and having a thermal expansion compatible with the semiconductor substrate.

18. The structure according to claim 17 , wherein the heat dissipating structure comprises a body made of silicon possessing at least one cavity closed by a cover made of silicon, said at least one cavity containing a phase-change material.

19. The structure according to claim 17 , further comprising a thermally conductive layer situated at an interface between the heat dissipating structure and the cavity of the integrated circuit chip.

20. An integrated structure, comprising:

an integrated circuit chip having a front side with an interconnection network and a back side;

a heat dissipating structure attached to the interconnection network on the front side of the integrated circuit chip, the heat dissipating structure being thermally conductive and having a thermal expansion compatible with the integrated circuit chip; and

wherein the heat dissipating structure comprises a body made of a semiconductor material possessing at least one cavity closed by a cover.

21. The structure according to claim 20 , wherein the cover is made of the semiconductor material and the semiconductor material is silicon, said at least one cavity containing a phase-change material.

22. The structure of claim 20 wherein the integrated circuit chip comprises a substrate formed of the semiconductor material.

23. An integrated structure, comprising:

an integrated circuit chip having a front side with an interconnection network and a back side;

a heat dissipating structure attached to the interconnection network on the front side of the integrated circuit chip, the heat dissipating structure being thermally conductive and having a thermal expansion compatible with the integrated circuit chip; and

wherein the heat dissipating structure comprises a body made of silicon possessing at least one cavity closed by a cover made of silicon, said at least one cavity containing a phase-change material.

24. The structure according to claim 23 , wherein the at least one cavity and an internal face of the cover are coated with a thermally conductive layer.

25. An integrated structure, comprising:

a substrate supporting at least one integrated circuit chip; and

a heat dissipating housing attached to the integrated circuit chip, the heat dissipating housing being thermally conductive and having a thermal expansion compatible with the integrated circuit chip;

wherein the heat dissipating housing comprises a body made of silicon possessing at least one cavity closed by a cover made of silicon and containing the phase-change material.

26. The structure according to claim 25 , wherein the at least one cavity and an internal face of the cover are coated with a thermally conductive layer.

27. An integrated structure, comprising:

an integrated circuit chip having a front side with an interconnection network and a back side with a formed cavity; and

a heat dissipating structure attached to the integrated circuit chip within said cavity on the back side, the heat dissipating structure being thermally conductive and having a thermal expansion compatible with the integrated circuit chip;

wherein the heat dissipating structure comprises a body made of silicon possessing at least one cavity closed by a cover made of silicon, said at least one cavity containing a phase-change material.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 11, 2022
From: STMICROELECTRONICS (CROLLES 2) SAS
To: STMICROELECTRONICS INTERNATIONAL N.V.
Reel/Frame 060784/0143 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 11, 2022
From: STMICROELECTRONICS SA
To: STMICROELECTRONICS INTERNATIONAL N.V.
Reel/Frame 060620/0769 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 14, 2014
From: CHAPELON, LAURENT-LUC; ANCEY, PASCAL; LHOSTIS, SANDRINE
To: STMICROELECTRONICS SA; STMICROELECTRONICS (CROLLES 2) SAS
Reel/Frame 031966/0468 →
Priority Claims (1)
FR 13 50770 · Jan 30, 2013 · national
Continuity (1)
Related Publication 20140210071A1 · Jul 31, 2014