Method for forming an insulating trench in a semiconductor substrate and structure, especially CMOS image sensor, obtained by said method
A structure comprising at least one DTI-type insulating trench in a substrate, the trench being at the periphery of at least one active area of the substrate forming a pixel, the insulating trench including a cavity filled with a dielectric material, the internal walls of the cavity being covered with a layer made of a boron-doped material.
1. A method comprising:
forming a cavity in a substrate, at a periphery of at least one active area of the substrate, said active area forming a pixel of a CMOS-type image sensor, the cavity having internal walls;
conformally depositing a layer on the internal walls of the cavity, with a volume of the cavity remaining unfilled, said layer being made of a boron-doped insulating material;
filling the volume remaining in the cavity with a dielectric material to form an insulating trench, the insulating trench including the conformally deposited layer and the dielectric layer; and
annealing the insulating trench.
2. The method of claim 1 , wherein the layer is made of boron-doped silicon oxide.
3. The method of claim 1 , wherein the boron-doped material comprises from 0.5 to 6% of boron by mass.
4. The method of claim 1 , wherein the layer has a thickness smaller than or equal to 300 nanometers.
5. The method of claim 1 , wherein conformally depositing comprises depositing the layer by chemical vapor deposition.
6. The method of claim 5 , wherein the deposition is performed in the following conditions:
temperature: from 400 to 550° C.;
pressure: from 200 to 650 Torrs;
speed: from 5 to 50 nm/min.
7. The method of claim 1 , wherein annealing comprises annealing in the following conditions:
anneal temperature: from 850 to 1,050° C.;
anneal time: from 20 to 120 minutes.
8. The method of claim 1 , wherein the insulating trench is a DTI-type insulating trench.