IP Library Granted Patent US 9,346,671
Granted Patent B2
US 9,346,671 · App. 14/172,479 · Granted May 24, 2016

Shielding MEMS structures during wafer dicing

Inventors: Alan J. Magnus (Gilbert, AZ); Chad S. Dawson (Queen Creek, AZ); Stephen R. Hooper (Mesa, AZ)
Assignee: Freescale Semiconductor, Inc.
B81C1/00896B81B7/0058B81C1/00865H01L21/6836B81B2201/0264B81B2203/0127
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Quick Facts
Patent No.
US 9,346,671
App. No.
14/172,479
Granted
May 24, 2016
Kind
B2
Abstract

A MEMS wafer ( 46 ) includes a front side ( 52 ) having a plurality of MEMS structure sites ( 60 ) at which MEMS structures ( 50 ) are located. A method ( 40 ) for protecting the MEMS structures ( 50 ) includes applying ( 44 ) a non-active feature ( 66 ) on the front side of the MEMS wafer in a region that is devoid of the MEMS structures and mounting ( 76 ) the front side of the MEMS wafer in a dicing frame ( 86 ) such that a back side ( 74 ) of the MEMS wafer is exposed. The MEMS wafer is then diced ( 102 ) from the back side into a plurality of MEMS dies ( 48 ).

Claims (31)

1. A method for protecting microelectromechanical systems (MEMS) structures on a MEMS wafer, said MEMS wafer including a front side having a plurality of MEMS structure sites at which said MEMS structures are located, and said method comprising:

applying a non-active feature on said front side of said MEMS wafer at a region of said MEMS wafer that is devoid of said MEMS structures, wherein said non-active feature comprises a nitride film;

mounting said front side of said MEMS wafer in a dicing frame such that a back side of said MEMS wafer is exposed; and

dicing said MEMS wafer from said back side into a plurality of MEMS dies.

2. A method as claimed in claim 1 wherein said applying operation includes placing said non-active feature at a perimeter of each of said MEMS structure sites.

3. A method as claimed in claim 1 wherein said applying operation includes placing at least a portion of said non-active feature in a scribe street of said MEMS wafer.

4. A method as claimed in claim 1 wherein said applying operation comprises:

applying a first material layer of said non-active feature on said front side of said MEMS wafer; and

applying a second material layer of said non-active feature on said first material layer to form a stacked arrangement of said first and second material layers.

5. A method as claimed in claim 1 wherein said non-active feature has a first height above a surface of said front side of said MEMS wafer that is greater than a second height of said MEMS structures above said surface.

6. A method as claimed in claim 5 wherein said mounting operation comprises attaching said non-active feature to a dicing tape, said first height of said non-active feature preventing contact of said MEMS structures with said dicing tape during said attaching operation.

7. A method as claimed in claim 6 wherein said first height of said non-active feature prevents contact of said MEMS structures with said dicing tape during said dicing operation.

8. A method as claimed in claim 6 wherein said dicing tape includes an adhesive layer attachable to said non-active feature, said adhesive layer having an adhesive thickness that is no greater than a difference between said first height and said second height.

9. A method as claimed in claim 1 wherein following said dicing operation, at least a portion of said non-active feature remains attached to said front side of said MEMS wafer, and said method further comprises leaving said remaining portion of said non-active feature intact on said front side of said MEMS wafer.

10. A method as claimed in claim 1 wherein said MEMS structures include pressure sensors having sense diaphragms located in said MEMS structure sites, and said non-active feature prevents said sense diaphragms from contacting an underlying surface during said mounting and dicing operations.

11. A method for protecting microelectromechanical systems (MEMS) structures on a MEMS wafer, said MEMS wafer including a front side having a plurality of MEMS structure sites at which said MEMS structures are located, and said method comprising

applying a non-active feature on said front side of said MEMS wafer at a perimeter of said MEMS structure sites in a scribe street of said MEMS wafer, said non-active feature having a first height above a surface of said front side of said MEMS wafer that is greater than a second height of said MEMS structures above said surface;

mounting said front side of said MEMS wafer in a dicing frame such that a back side of said MEMS wafer is exposed, said mounting operation including attaching said non-active feature to a dicing tape, said dicing tape including an adhesive layer attachable to said non-active feature, said adhesive layer having an adhesive thickness that is no greater than a difference between said first height and said second height, wherein said first height of said non-active feature prevents contact of said MEMS structures with said dicing tape during said attaching operation; and

dicing said MEMS wafer from said back side into a plurality of MEMS dies.

12. A method as claimed in claim 11 wherein said first height of said non-active feature prevents contact of said MEMS structures with said dicing tape during said dicing operation.

13. A method as claimed in claim 11 wherein said applying operation comprises:

applying a first material layer of said non-active feature on said front side of said MEMS wafer; and

applying a second material layer of said non-active feature on said first material layer to form a stacked arrangement of said first and second material layers.

14. A method for protecting microelectromechanical systems (MEMS) structures on a MEMS wafer, said MEMS wafer including a front side having a plurality of MEMS structure sites at which said MEMS structures are located, wherein said MEMS structures include pressure sensors having sense diaphragms located in said MEMS structure sites, and said method comprises:

applying a non-active feature on said front side of said MEMS wafer at a region of said MEMS wafer that is devoid of said MEMS structures, wherein said non-active feature comprises one of a polyimide film and a nitride film, and wherein said applying operation includes placing said non-active feature at a perimeter of each of said MEMS structure sites;

mounting said front side of said MEMS wafer in a dicing frame such that a back side of said MEMS wafer is exposed; and

dicing said MEMS wafer from said back side into a plurality of MEMS dies, said non-active feature preventing said sense diaphragms from contacting an underlying surface during said mounting and dicing operations.

15. A method as claimed in claim 14 wherein said non-active feature has a first height above a surface of said front side of said MEMS wafer that is greater than a second height of said MEMS structures above said surface.

16. A method as claimed in claim 14 wherein said applying operation further includes:

applying a first material layer of said non-active feature on said front side of said MEMS wafer; and

applying a second material layer of said non-active feature on said first material layer to form a stacked arrangement of said first and second material layers.

Assignments (27)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 23, 2026
From: NXP USA, INC.
To: STMICROELECTRONICS INTERNATIONAL N.V.
Reel/Frame 075220/0239 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040632 FRAME: 0001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Sep 21, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 044209/0047 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040632/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE APPLICATION NUMBERS PREVIOUSLY RECORDED AT REEL: 037458 FRAME: 0438. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded May 12, 2016
From: CITIBANK, NA
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038665/0136 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT APPLICATION NUMBERS 12222918, 14185362, 14147598, 14185868 & 14196276 PREVIOUSLY RECORDED AT REEL: 037458 FRAME: 0479. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded May 12, 2016
From: CITIBANK, NA
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038665/0498 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 7, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037458/0479 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 7, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037458/0438 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0763 →
SUPPLEMENT TO SECURITY AGREEMENT Recorded May 7, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 032845/0497 →
SUPPLEMENT TO SECURITY AGREEMENT Recorded May 7, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 032845/0522 →
SUPPLEMENT TO SECURITY AGREEMENT Recorded May 7, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 032845/0442 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 4, 2014
From: MAGNUS, ALAN J.; DAWSON, CHAD S.; HOOPER, STEPHEN R.
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 032138/0036 →
Continuity (1)
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