IP Library Granted Patent US 9,678,108
Granted Patent B1
US 9,678,108 · App. 14/178,171 · Granted Jun 13, 2017

Methods to manufacture semiconductor probe tips

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Quick Facts
Patent No.
US 9,678,108
App. No.
14/178,171
Granted
Jun 13, 2017
Kind
B1
Abstract

The method for forming a semiconductor probe tip comprises depositing a first copper layer onto exposed electrically conductive areas of a wafer. The first copper layer surrounds a non-conductive polymer structure on the wafer. The non-conductive polymer structure is removed to form a primary cavity in the first copper layer. The wafer and the primary cavity are coated with a polymer layer. Regions of the polymer layer are removed to form a secondary cavity within and alongside the primary cavity. A metal layer is deposited on exposed electrically conductive areas of the wafer and within bounds of the secondary cavity.

Claims (21)

1. A method for forming a semiconductor probe tip, the method comprising:

depositing a first copper layer onto exposed electrically conductive areas of a wafer, wherein the first copper layer surrounds a non-conductive polymer structure on the wafer;

removing the non-conductive polymer structure to form a primary cavity in the first copper layer;

coating the wafer and the primary cavity with a polymer layer;

removing regions of the polymer layer to form a secondary cavity within and alongside the primary cavity; and

depositing a metal layer on exposed electrically conductive areas of the wafer and within bounds of the secondary cavity.

2. The method of claim 1 further comprising:

removing the polymer layer;

depositing a second copper layer to cover exposed electrically conductive areas of the wafer, the first copper layer, and the metal layer;

planarizing the second copper layer so that an upper surface of the first copper layer is substantially exposed, wherein planarizing the second copper layer removes any of the metal layer above the upper surface of the first copper layer; and

selectively etching the first and second copper layers to reveal a remaining portion of the metal layer, wherein the remaining portion of the metal layer comprises a semiconductor probe tip, and wherein a cross-section of an apex of the semiconductor probe tip is narrower than a cross-section of a foot of the semiconductor probe tip.

3. The method of claim 1 further comprising planarizing the first layer of copper.

4. The method of claim 1 , wherein dimensions of the non-conductive polymer structure define dimensions of the primary cavity.

5. The method of claim 1 , wherein dimensions of the removed regions of the polymer layer define dimensions of the secondary cavity.

6. The method of claim 1 , wherein a sidewall of the secondary cavity comprises an electrically conductive surface.

7. The method of claim 1 , wherein the metal layer is contiguous.

8. The method of claim 1 , wherein the metal layer comprises one of:

rhodium;

nickel;

gold; and

two or more layers of dissimilar metal layers.

Assignments (3)
SECURITY INTEREST Recorded Jul 29, 2025
From: FORMFACTOR, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
Reel/Frame 072263/0272 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 18, 2021
From: ADVANTEST AMERICA, INC.
To: FORMFACTOR, INC.
Reel/Frame 057219/0246 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 12, 2014
From: CROS, FLORENT
To: ADVANTEST AMERICA, INC.
Reel/Frame 032207/0775 →