Imaging systems with flip chip ball grid arrays
View Patent ↗An imaging system may include an integrated circuit package that includes an image sensor die mounted in a flip chip configuration to a package substrate. The image sensor die may be a backside illumination sensor die. The image sensor die may include an imaging device structure formed over a carrier layer. Through-silicon vias formed in the carrier layer may couple imaging device circuitry in the imaging device structure to conductive bumps on the carrier layer that are coupled to metal interconnects. A ball grid array may be formed on a surface of the package substrate that may be coupled to the conductive bumps. A glass lid may be attached to the image sensor die using attachment structures such that an air gap is formed between the glass lid and the image sensor die. Package sealing material may be deposited between the image sensor die and the package substrate.
1. An integrated circuit package:
a package substrate; and
an image sensor die formed on the package substrate in a flip chip configuration, wherein the image sensor die has a first side that is in contact with an electrical connection and a second side that opposes the first side;
a glass lid attached on the second side of the image sensor die such that an air gap is formed between the glass lid and the image sensor die;
a metal interconnect that is formed in the first side of the image sensor die and that is coupled to the electrical connection; and
a through-silicon via that is coupled to the metal interconnect and that extends only partially through the image sensor die.
2. The integrated circuit package defined in claim 1 , further comprising:
a ball grid array coupled to the package substrate, wherein the ball grid array comprises a plurality of solder balls.
3. The integrated circuit package defined in claim 2 , wherein the image sensor die comprises an imaging device structure and a carrier layer, wherein the carrier layer includes metal interconnects that are coupled to the ball grid array.
4. The integrated circuit package defined in claim 3 , wherein the electrical connection comprises:
a plurality of conductive bumps interposed between the carrier layer and the package substrate.
5. The integrated circuit package defined in claim 4 , wherein the plurality of conductive bumps are coupled to the ball grid array without redistribution layers formed at the first side of the image sensor die.
6. The integrated circuit package defined in claim 1 , further comprising:
an attachment structure interposed between the glass lid and the image sensor die.
7. The integrated circuit package defined in claim 1 , further comprising:
package sealing material that at least partially surrounds the glass lid and the image sensor die.
8. The integrated circuit package defined in claim 7 , further comprising:
underfill material that is disposed between the carrier layer and the package substrate and that is formed from the same material as the package sealing material.
9. The integrated circuit package defined in claim 1 , wherein the image sensor die comprises a backside illuminated (BSI) image sensor die configured to receive light via its second side.
10. A method of forming an integrated circuit package, comprising:
forming an image sensor die having a first surface at which conductive bumps are formed and a second surface that opposes the first surface;
forming a through-silicon via that extends only partially through the image sensor die;
attaching a glass layer to the second surface of the image sensor die; and
mounting the image sensor die on a package substrate in a flip chip arrangement such that the first surface is facing the package substrate.
11. The method defined in claim 10 , further comprising:
forming a solder ball grid array coupled to the package substrate.
12. The method defined in claim 11 , wherein the image sensor die comprises an imaging device structure formed over a carrier layer, wherein the carrier layer comprises metal interconnects, further comprising:
forming conductive bumps on the carrier layer that are coupled to the metal interconnects, wherein the metal interconnects couples the conductive bumps to the through-silicon via.
13. The method defined in claim 10 , further comprising:
depositing package sealing material on the package substrate around the glass layer and the image sensor die.
14. The method defined in claim 13 , wherein depositing the package sealing material comprises depositing the package sealing material between the image sensor die and the package substrate with the package sealing material.
15. The method defined in claim 10 , wherein mounting the glass layer to the image sensor die comprises applying an adhesive layer between the glass layer and the image sensor die.
16. A system, comprising:
a central processing unit;
memory;
input-output circuitry; and
an imaging device, comprising;
a package substrate; and
an image sensor die that has a first surface and a second surface different from the first surface and that is formed over the package substrate in a flip chip configuration so that the first surface is attached to the package substrate;
metal routing paths formed in the first surface of the image sensor die;
a through-silicon via that is coupled to the metal routing paths and that terminates before reaching the first surface of the image sensor die; and
a glass lid mounted directly on the second side of the image sensor die.
17. The system defined in claim 16 , wherein the image sensor die comprises a backside illuminated image sensor die configured to receive light through its second side.
18. The integrated circuit package defined in claim 1 , wherein the electrical connection comprises solder.