IP Library › Granted Patent US 10,279,348
Granted Patent B2
US 10,279,348 · App. 14/198,425 · Granted May 7, 2019

Semiconductor micro-analysis chip and method of manufacturing the same

Inventors: Hiroko Miki (Kawasaki, JP); Hideto Furuyama (Yokohama, JP); Kentaro Kobayashi (Tokyo, JP); Akihiro Kojima (Nonoichi, JP)
Assignee: KABUSHIKI KAISHA TOSHIBA
B01L3/502753G01N15/1031G01N15/1484B01L2200/0647B01L2300/0645B01L2300/0681B01L2400/086G01N2015/0053G01N2015/1006G01N2015/1486
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Quick Facts
Patent No.
US 10,279,348
App. No.
14/198,425
Granted
May 7, 2019
Kind
B2
Abstract

One of embodiments is a semiconductor micro-analysis chip for detecting particles in a sample liquid. The chip comprises a semiconductor substrate, a first flow channel provided on the semiconductor substrate to allow the sample liquid to flow therein, a second flow channel provided at a different position from the first flow channel of the semiconductor substrate to allow the sample liquid or an electrolyte solution to flow therein, a contact portion where a portion of the first flow channel and a portion of the second flow channel abut each other or intersect one another with a partition being arranged between the flow channels, and a fine hole provided on the partition of the contact portion to allow the particles to pass therethrough.

Claims (36)

1. A semiconductor micro-analysis chip for detecting particles in a sample liquid, the chip comprising:

a semiconductor substrate;

a first flow channel which has walls, a top surface, and a bottom surface, and which is provided on the semiconductor substrate, and through which the sample liquid or an electrolyte solution passes, a first outlet of the sample liquid or the electrolyte solution being provided at one end side of the first flow channel, and a first inlet of the sample liquid or the electrolyte solution being provided at the other end side of the first flow channel;

a second flow channel which has walls, a top surface, and a bottom surface, and which is provided at a different position from the first flow channel of the semiconductor substrate, and through which the sample liquid or the electrolyte solution passes, a second outlet of the sample liquid or the electrolyte solution being provided at one end side of the second flow channel, and a second inlet of the sample liquid or the electrolyte solution being provided at the other end side of the second flow channel, wherein a portion of the second flow channel intersecting with a portion of the first flow channel overlaps the portion of the first flow channel such that an entirety of the portion of the first flow channel passes underneath the portion of the second flow channel, the portion of the second flow channel being in contact with the portion of the first flow channel with a partition interposed therebetween, and at least a portion of the partition being the top surface of the first flow channel and the bottom surface of the second flow channel;

a fine hole which is provided in the partition and through which the particles pass;

a first electrode exposed at least in part in the first flow channel; and

a second electrode exposed at least in part in the second flow channel,

wherein the first electrode and the second electrode face each other across the fine hole.

2. The chip of claim 1 , further comprising: a particle size filter arranged in one of the first flow channel and the second flow channel, the particles passing through or being collected by the particle size filter.

3. The chip of claim 1 , wherein:

the first flow channel is a groove-shaped tunnel-like flow channel comprising a groove provided in the semiconductor substrate,

the second flow channel is a stack-shaped tunnel-like flow channel which forms a hollow structure provided on the semiconductor substrate.

4. The chip of claim 1 , wherein:

each of the first flow channel and the second flow channel is a stack-shaped tunnel- like flow channel which forms a hollow structure provided on the semiconductor substrate.

5. The chip of claim 4 , wherein at portions of the first and second flow channels other than the intersecting portions of the first and second flow channels, the bottom surface of the second flow channel is higher than the bottom surface of the first flow channel, and the top surface of the second flow channel is higher than the top surface of the first flow channel.

6. The chip of claim 1 , further comprising a particle size filter arranged at a downstream side of the fine hole in one of the first flow channel and the second flow channel, the particles being collected by the particle size filter while the sample liquid passes therethrough,

wherein the particles pass through the fine hole from the flow channel on a side where the particle size filter is provided to the other flow channel.

7. The chip of claim 6 , wherein:

the particle size filter comprises microscopic columnar structures arranged at regular intervals, and

the columnar structures are arranged to cross obliquely to the flow channel.

8. The chip of claim 1 , wherein the chip further comprises a first absorber which absorbs the sample liquid or the electrolyte solution on the first outlet, and a second absorber which absorbs the sample liquid or the electrolyte solution on the second outlet.

9. The chip of claim 8 , wherein the chip further comprises a third absorber which absorbs the sample liquid or the electrolyte solution on the first inlet, and a fourth absorber which absorbs the sample liquid or the electrolyte solution on the second inlet.

10. The chip of claim 8 , wherein each of the first and second outlets is a groove-shaped outlet provided in the semiconductor substrate, a plurality of columnar structures are provided on each of the first and second outlets, and each of the first absorber and the second absorber is provided on corresponding columnar structures of the plurality of columnar structures and the substrate.

11. The chip of claim 1 , wherein the chip further comprises a first absorber which absorbs the sample liquid or the electrolyte solution on the first inlet, and a second absorber which absorbs the sample liquid or the electrolyte solution on the second inlet.

12. The chip of claim 1 , wherein:

each of the first flow channel and the second flow channel is a stack-shaped tunnel-like flow channel which forms a hollow structure provided on the semiconductor substrate, and a width of the second flow channel is narrower than a width of the first flow channel.

13. The chip of claim 1 , wherein the portion of the first flow channel is a middle portion of the first flow channel other than the one end side and the other end side of the first flow channel, and the portion of the second flow channel is a middle portion of the first flow channel other than the one end side and the other end side of the second flow channel.

14. A semiconductor micro-analysis chip apparatus, comprising:

the semiconductor micro-analysis chip of claim 11 ;

a package configured to contain the semiconductor microchip;

a sample liquid inlet port provided on the first absorber and the second absorber of the package; and

a partition plate provided at the sample liquid inlet port and configured to supply the sample liquid introduced to the sample liquid inlet port separately to the first absorber and the second absorber.

15. The apparatus of claim 14 , further comprising a particle size filter arranged in one of the first flow channel and the second flow channel, the particles passing through or being collected by the particle size filter.

16. The apparatus of claim 14 , wherein the first flow channel and the second flow channel are groove-shaped tunnel-like flow channels each comprising a groove provided in the semiconductor substrate.

17. The apparatus of claim 14 , wherein:

each of the first flow channel and the second flow channel is a stack-shaped tunnel-like flow channel which forms a hollow structure provided on the semiconductor substrate.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 27, 2020
From: TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
To: AIPORE, INC.
Reel/Frame 054477/0524 →
SPLIT AND SUCCESSION Recorded Sep 1, 2020
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
Reel/Frame 053837/0424 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 5, 2014
From: MIKI, HIROKO; FURUYAMA, HIDETO; KOBAYASHI, KENTARO; KOJIMA, AKIHIRO
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 032359/0544 →
Priority Claims (1)
JP 2013-167649 · Aug 12, 2013 · national
Continuity (1)
Related Publication 20150041316A1 · Feb 12, 2015