IP Library Granted Patent US 9,105,735
Granted Patent B2
US 9,105,735 · App. 14/217,887 · Granted Aug 11, 2015

Transistor and display device

Inventors: Shunpei Yamazaki (Setagaya, JP); Toshinari Sasaki (Atsugi, JP); Junichiro Sakata (Atsugi, JP); Masashi Tsubuku (Atsugi, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L29/78693H01L27/1225H01L27/1248H01L29/45H01L29/7869H01L29/78618H01L27/1214H01L29/458H01L29/4908
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Quick Facts
Patent No.
US 9,105,735
App. No.
14/217,887
Granted
Aug 11, 2015
Kind
B2
Abstract

It is an object to manufacture a highly reliable display device using a thin film transistor having favorable electric characteristics and high reliability as a switching element. In a bottom gate thin film transistor including an amorphous oxide semiconductor, an oxide conductive layer having a crystal region is formed between an oxide semiconductor layer which has been dehydrated or dehydrogenated by heat treatment and each of a source electrode layer and a drain electrode layer which are formed using a metal material. Accordingly, contact resistance between the oxide semiconductor layer and each of the source electrode layer and the drain electrode layer can be reduced; thus, a thin film transistor having favorable electric characteristics and a highly reliable display device using the thin film transistor can be provided.

Claims (30)

1. A semiconductor device comprising:

a gate electrode;

a gate insulating layer over the gate electrode;

an oxide semiconductor layer over the gate insulating layer;

an oxide insulating layer over the oxide semiconductor layer;

a source electrode layer over the oxide semiconductor layer and the oxide insulating layer;

a drain electrode layer over the oxide semiconductor layer and the oxide insulating layer; and

an insulating layer over the oxide insulating layer and the oxide semiconductor layer,

wherein the oxide insulating layer is in contact with an edge portion of the oxide semiconductor layer, and

wherein the edge portion is in an oxygen-excess state.

2. The semiconductor device according to claim 1 ,

wherein the oxide semiconductor layer comprises a channel formation region, and

wherein the channel formation region is in an oxygen-excess state.

3. The semiconductor device according to claim 1 ,

wherein the insulating layer is over the source electrode layer and the drain electrode layer.

4. The semiconductor device according to claim 1 ,

wherein the insulating layer is in contact with the oxide semiconductor layer.

5. The semiconductor device according to claim 1 ,

wherein a peak of a desorption constituent, which is derived from moisture, is not shown in a spectrum of the oxide semiconductor layer, which is shown with thermal desorption spectroscopy in a temperature range of greater than or equal to 200° C. and less than or equal to 350° C.

6. The semiconductor device according to claim 1 ,

wherein the oxide semiconductor layer comprises indium, gallium, and zinc.

7. The semiconductor device according to claim 1 ,

wherein the oxide insulating layer comprises silicon.

8. The semiconductor device according to claim 1 ,

wherein the source electrode layer and the drain electrode layer comprise at least one of titanium, molybdenum, tungsten, aluminum, chromium, copper, and tantalum.

9. The semiconductor device according to claim 1 ,

wherein the insulating layer comprises at least one of silicon oxide, silicon oxynitride, aluminum oxide, and aluminum oxynitride.

10. The semiconductor device according to claim 1 , further comprising an oxide conductive layer over the oxide semiconductor layer.

11. A display device comprising the semiconductor device according to claim 1 .

12. An electronic device comprising the semiconductor device according to claim 1 .

Priority Claims (1)
JP 2009-204801 · Sep 4, 2009 · national
Continuity (3)
Continuation 13770120 · Feb 19, 2013
Continuation 12869278 · Aug 26, 2010
Related Publication 20140197406A1 · Jul 17, 2014