IP Library Granted Patent US 9,277,657
Granted Patent B2
US 9,277,657 · App. 14/222,077 · Granted Mar 1, 2016

Wiring board

Inventors: Hiroyuki Fukushima (Fukuchiyama, JP); Fumio Kumokawa (Hirakata, JP)
Assignee: Kyocera SLC Technologies Corporation
H05K3/4602H05K1/0271H05K3/3436H05K3/4644H05K2201/096H05K2201/09609H05K2201/09781
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Quick Facts
Patent No.
US 9,277,657
App. No.
14/222,077
Granted
Mar 1, 2016
Kind
B2
Abstract

A wiring board includes a core substrate having a number of through-holes, and buildup insulating layers and buildup wiring layers alternately laminated on upper and lower surfaces of the core substrate, in which a first through-hole group is arranged in a first region in the core board at a first arrangement density, the first region being opposed to the semiconductor element connection pad formation region, a second through-hole group is arranged in a second region at a second arrangement density lower than the first arrangement density, the second region being located in an outer peripheral portion of the core substrate and away from the first region, and a third through-hole group is arranged in a third region at a third arrangement density higher than the second arrangement density, the third region being located between the first region and the second region.

Claims (16)

1. A wiring board comprising:

a core substrate having a number of through-holes; and

buildup insulating layers and buildup wiring layers alternately laminated on upper and lower surfaces of the core substrate, the wiring board having a semiconductor element connection pad formation region where a number of semiconductor element connection pads made of the buildup wiring layer are arranged in a lattice-like form in a center of an upper surface, wherein

a first through-hole group is arranged in a first region in the core substrate at a first arrangement density, the first region being opposed to the semiconductor element connection pad formation region,

a second through-hole group is arranged in a second region at a second arrangement density lower than the first arrangement density, the second region being located in an outer peripheral portion of the core substrate and away from the first region, and

a third through-hole group is arranged in a third region at a third arrangement density higher than the second arrangement density, the third region being located between the first region and the second region.

2. The wiring board according to claim 1 , wherein

external connection pads made of the buildup wiring layer are arranged in a center of a lower surface.

3. The wiring board according to claim 1 , wherein

the third arrangement density is equal to or smaller than the first arrangement density.

4. The wiring board according to claim 1 , wherein

the first through-hole group includes a grounding through-hole and a power supply through-hole.

5. The wiring board according to claim 1 , wherein

the second through-hole group includes a signal through-hole.

6. The wiring board according to claim 1 , wherein

the third through-hole group includes a dummy through-hole.

Assignments (3)
MERGER Recorded Apr 21, 2017
From: KYOCERA CIRCUIT SOLUTIONS, INC.
To: KYOCERA CORPORATION
Reel/Frame 042522/0699 →
CHANGE OF NAME Recorded Aug 13, 2015
From: KYOCERA SLC TECHNOLOGIES CORPORATION
To: KYOCERA CIRCUIT SOLUTIONS, INC.
Reel/Frame 036344/0749 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 21, 2014
From: FUKUSHIMA, HIROYUKI; KUMOKAWA, FUMIO
To: KYOCERA SLC TECHNOLOGIES CORPORATION
Reel/Frame 032500/0110 →
Priority Claims (1)
JP 2013-068185 · Mar 28, 2013 · national
Continuity (1)
Related Publication 20140291005A1 · Oct 2, 2014