IP Library Granted Patent US 9,367,375
Granted Patent B2
US 9,367,375 · App. 14/251,677 · Granted Jun 14, 2016

Direct connect algorithm

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Quick Facts
Patent No.
US 9,367,375
App. No.
14/251,677
Granted
Jun 14, 2016
Kind
B2
Abstract

A system includes a safety relevant component that generates a data packet in response to receiving a request to perform a task and that communicates the data packet. The system further includes a first fail-safe chassis (FSC) that continuously generates a first and second chassis health signals, that determines whether the data packet is valid, and that selectively determines whether to de-assert the first and second chassis health signals based on the determination. The system also includes a second FSC that continuously generates a third a fourth chassis health signals, that determines whether a data packet is valid, and that selectively determines whether to de-assert the third and fourth chassis health signals based on the determination. The system includes a direct connect algorithm state machine that determines whether to instruct the one of the first and second FSCs to operate in a predetermined mode based on the chassis health signals.

Claims (38)

1. A system comprising:

a safety relevant component that generates a data packet in response to receiving a request to perform a task and that communicates the data packet;

a first fail-safe chassis (FSC) that:

continuously asserts a first chassis health signal and a second chassis health signal;

determines whether a data packet is valid; and

selectively determines whether to de-assert the first chassis health signal and the second chassis health signal based on the determination;

a second FSC that:

continuously asserts a third chassis health signal and a fourth chassis health signal;

determines whether a data packet is valid; and

selectively determines whether to de-assert the third chassis health signal and the fourth chassis health signal based on the determination; and

a direct connect algorithm (DCA) state machine that determines whether to instruct the first FSC to operate in a predetermined mode based on the first chassis health signal, second chassis health signal, third chassis health signal, and the fourth chassis health signal.

2. The system of claim 1 wherein the first FSC includes a first master CPU that receives a first copy of the data packet and a first checker CPU that receives a second copy of the data packet.

3. The system of claim 2 wherein the first master CPU communicates the first copy to the first checker CPU and the first checker CPU communicates the second copy to the first master CPU.

4. The system of claim 3 wherein the first master CPU de-asserts the first chassis health signal based on a first comparison between the first copy and the second copy and wherein the first checker CPU de-asserts the second chassis health signal based on a second comparison between the first copy and the second copy.

5. The system of claim 1 wherein the second FSC includes a second master CPU that receives a data packet and a second checker CPU that receives a data packet.

6. The system of claim 5 wherein the second master CPU communicates a copy to the second checker CPU and the second checker CPU communicates a copy to the second master CPU.

7. The system of claim 6 wherein the second master CPU de-asserts the third chassis health signal based on a first comparison between the two copies and wherein the second checker CPU de-asserts the fourth chassis health signal based on a second comparison between two copies.

8. The system of claim 1 wherein the DCA state machine instructs the first FSC to operate as an active FSC in response to the first, second, third, and fourth chassis health signals being asserted.

9. The system of claim 8 wherein the DCA state machine instructs the first FSC to operate in a safe state in response to least one of the first and second chassis health signals being de-asserted.

10. The system of claim 9 wherein the DCA state machine instructs the second FSC to operate as the active FCS.

11. A method comprising:

generating a data packet in response to receiving a request to perform a task;

communicating the data packet;

continuously asserting a first chassis health signal;

continuously asserting a second chassis health signal;

continuously asserting a third chassis health signal;

continuously asserting a fourth chassis health signal;

determining whether the data packet is valid selectively determining whether to de-assert the first, second, third, and fourth chassis health signals based on the determination; and

determining whether to instruct a first FSC to operate in a predetermined mode based on the first, second, third, and fourth chassis health signals.

12. The method of claim 11 further comprising receiving a first copy of the data packet and a second copy of the data packet.

13. The method of claim 12 further comprising de-asserting the first chassis health signal based on a first comparison between the first copy and the second copy.

14. The method of claim 13 further comprising de-asserting the second chassis health signal based on a second comparison between the first copy and the second copy.

15. The method of claim 11 further comprising receiving a data packet and a copy of the data packet.

16. The method of claim 15 further comprising further comprising de-asserting the third chassis health signal based on a first comparison between a third copy and a fourth copy.

17. The method of claim 16 further comprising de-asserting the fourth chassis health signal based on a second comparison between the third copy and the fourth copy.

18. The method of claim 11 further comprising instructing a first FSC to operate in the predetermined mode in response to the first, second, third, and fourth chassis health signals being asserted.

19. The method of claim 11 further comprising instructing a first FSC to operate in a safe state in response at least one of the first and second chassis health signals being de-asserted.

20. The method of claim 19 further comprising instructing a second FSC to operate in the predetermined mode.

Assignments (9)
PATENT SECURITY AGREEMENT Recorded Jun 30, 2025
From: CREELED, INC.; PENGUIN SOLUTIONS CORPORATION (DE); SMART EMBEDDED COMPUTING, INC.; SMART HIGH RELIABILITY SOLUTIONS LLC; SMART MODULAR TECHNOLOGIES, INC.; PENGUIN COMPUTING, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 071755/0001 →
RELEASE OF PATENT SECURITY INTEREST RECORDED AT R/F 058983/0001 Recorded Jun 25, 2025
From: CITIZENS BANK, N.A.
To: SMART MODULAR TECHNOLOGIES, INC.; SMART EMBEDDED COMPUTING, INC.; SMART HIGH RELIABILITY SOLUTIONS LLC; CREELED, INC.
Reel/Frame 071725/0207 →
RELEASE OF SECURITY INTEREST Recorded Feb 7, 2022
From: BANK OF AMERICA, N.A., AS AGENT
To: SMART EMBEDDED COMPUTING, INC.
Reel/Frame 058913/0097 →
RELEASE OF SECURITY INTEREST AT REEL 050471 FRAME 0912 Recorded Feb 7, 2022
From: BARCLAYS BANK PLC
To: SMART EMBEDDED COMPUTING, INC.
Reel/Frame 058961/0005 →
SECURITY INTEREST Recorded Feb 7, 2022
From: SMART MODULAR TECHNOLOGIES, INC.; SMART HIGH RELIABILITY SOLUTIONS, LLC; SMART EMBEDDED COMPUTING, INC.; CREELED, INC.
To: CITIZENS BANK, N.A.
Reel/Frame 058983/0001 →
SECURITY INTEREST Recorded Dec 23, 2020
From: SMART EMBEDDED COMPUTING INC.
To: BANK OF AMERICA, N.A., AS AGENT
Reel/Frame 054739/0137 →
CHANGE OF NAME Recorded Jun 24, 2020
From: ARTESYN EMBEDDED COMPUTING, INC.
To: SMART EMBEDDED COMPUTING, INC.
Reel/Frame 053023/0953 →
SECURITY AGREEMENT Recorded Sep 24, 2019
From: SMART EMBEDDED COMPUTING, INC.
To: BARCLAYS BANK PLC
Reel/Frame 050471/0912 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 9, 2014
From: CORNES, MARTIN PETER JOHN; PERKINS, GARY
To: ARTESYN EMBEDDED COMPUTING, INC.
Reel/Frame 033271/0203 →