Method of forming a protecting element comprising a first high concentration impurity region separated by an insulating region of a substrate
View Patent ↗With a microwave FET, an incorporated Schottky junction capacitance or PN junction capacitance is small and such a junction is weak against static electricity. However, with a microwave device, the method of connecting a protecting diode cannot be used since this method increases the parasitic capacitance and causes degradation of the high-frequency characteristics. In order to solve the above problems, a protecting element, having a first n + -type region—insulating region—second n + -type region arrangement is connected in parallel between two terminals of a protected element having a PN junction, Schottky junction, or capacitor. Since discharge can be performed between the first and second n + regions that are adjacent each other, electrostatic energy that would reach the operating region of an FET can be attenuated without increasing the parasitic capacitance.
1. A method for forming a protecting element comprising:
providing a substrate having an insulating region;
forming a first high concentration impurity region in the insulating region and connected to a first terminal of an element formed in the substrate; and
forming a second high concentration impurity region in the insulating region and connected to a second terminal of the element, the first and second high concentration impurity regions facing each other with a portion of the insulating region disposed therebetween, wherein upon discharging of electrostatic energy applied between the first and second terminals a current path is formed in the insulating region, a width of the first high concentration impurity region is 5 micron or smaller such that the current path is formed from an outer side surface of the first high concentration impurity region to the second high concentration impurity region, the outer side surface of the first high concentration impurity region being opposite from an inner side surface of the first high concentration impurity region that faces the portion of the insulating region, and wherein a distance between a bottom surface of the first high concentration impurity region and a bottom surface of the insulating portion is about 20 micron or larger.
2. The method of claim 1 , wherein forming the second high concentration impurity region comprising forming the second high concentration impurity region having a width configured so that upon the discharging of the electrostatic energy applied between the first and second terminals the current path from the outer side surface of the first high concentration impurity region reaches an outer side surface of the second high concentration impurity region, the outer side surface of the second high concentration impurity region being opposite from an inner side surface of the second high concentration impurity region that faces the portion of the insulating region.
3. The method of claim 2 , wherein:
forming the first high concentration impurity region includes forming the width of the first high concentration impurity region 5 micron or smaller; and
forming the second concentration impurity region includes forming the width of the second high concentration impurity region about 5 micron or smaller.
4. The method of claim 1 , wherein forming the first high concentration impurity region and forming the second concentration impurity region comprises providing a separation of the first and second high concentration impurity regions is between 4 microns and 10 microns.
5. The method of claim 1 , wherein forming the first high concentration impurity region and forming the second concentration impurity region provides a capacitance between the first and second high concentration impurity regions is 40 fF or smaller.
6. The method of claim 1 , wherein providing the substrate comprises providing the insulating region an impurity concentration of about 1×10 14 cm −3 or lower, a volume resistivity of about 1×10 3 ohm cm or higher, and configured to provide an additional current path upon the discharging between the inner side surface of the first high concentration impurity region and an inner side surface of the second high concentration impurity region and between bottom surfaces of the first and second high concentration impurity regions.
7. The method of claim 1 , wherein providing the substrate comprises providing the insulating layer extending, in plan view of the protecting element, from the first high concentration impurity region by a least 10 microns in a direction perpendicular to the outer surface of the first high concentration impurity region and away from the first high concentration impurity region.
8. The method of claim 1 , wherein:
forming the first high concentration impurity region comprises connecting the first high concentration impurity region to a first electrode of a capacitor;
forming the second high concentration impurity region comprises connecting the second high concentration impurity region to a second electrode of the capacitor; and
providing the substrate includes providing the insulating region extending, in plan view of the protecting element, from the first high concentration impurity region by at least 10 microns in a direction perpendicular to the outer side surface of the first high concentration impurity region and away from the first high concentration impurity region.