IP Library Granted Patent US 9,349,767
Granted Patent B2
US 9,349,767 · App. 14/254,196 · Granted May 24, 2016

Image sensors with through-oxide via structures

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,349,767
App. No.
14/254,196
Granted
May 24, 2016
Kind
B2
Abstract

An imaging system may include an image sensor die stacked on top of a digital signal processor (DSP) die. The image sensor die may be a backside illuminated image sensor die. Through-oxide vias (TOVs) may be formed in the image sensor die and may extend at least partially into in the DSP die to facilitate communications between the image sensor die and the DSP die. Color filter housing structures may be formed over active image sensor pixels on the image sensor die. In-pixel grid structures may be integrated with the color filter housing structures to help reduce crosstalk. Light shielding structures may be formed over reference image sensor pixels on the image sensor die. The TOVs, the in-pixel grid structures, and the light shielding structures may be formed simultaneously. The formation of the color filter housing structures may also be integrated the formation of the TOVs.

Claims (47)

1. Imaging circuitry, comprising:

a digital signal processor die; and

an image sensor die mounted on the digital signal processor die, wherein the image sensor die comprises:

a through-oxide via structure that extends at least partly into the digital signal processor die;

a light shielding structure, wherein the light shielding structure and the through-oxide via structure are formed in at least a common dielectric layer in the image sensor die; and

color filter array housing structures that are formed in the same dielectric layer in which the light shielding structure is formed, wherein the through-oxide via structure has a dielectric liner, and wherein the color filter array housing structures have walls that are formed at the same time as the dielectric liner.

2. The imaging circuitry defined in claim 1 , wherein the through-oxide via structure conveys image pixel signals from the image sensor die to the digital signal processor die.

3. The imaging circuitry defined in claim 1 , wherein the image sensor die further comprises:

a substrate;

a shallow trench isolation structure formed in the substrate, wherein the through-oxide via structure is formed through the shallow trench isolation structure.

4. The imagine circuitry defined in claim 1 , wherein the image sensor die comprises a backside illuminated (BSI) image sensor die.

5. The imaging circuitry defined in claim 1 , wherein the image sensor die further comprises:

a substrate;

a plurality of image sensor pixels formed in the substrate; and

an in-pixel grid structure that includes openings corresponding to respective image sensor pixels in the plurality of image sensor pixels and that is formed in the same dielectric layer in which the light shielding structure is formed.

6. The imaging circuitry defined in claim 5 , wherein the in-pixel grid structure, the light shielding structure, and the through-oxide via structure are formed simultaneously.

7. The imaging circuitry defined in claim 1 , wherein the image sensor die further comprises:

a plurality of imaging pixels formed directly below the color filter array housing structures; and

a plurality of reference pixels formed directly below the light shielding structure, wherein the light shielding structure prevents the plurality of reference pixels from receiving incoming light.

8. A system, comprising:

a signal processing unit;

memory;

a lens;

input-output circuitry; and

an imaging device that is stacked on the signal processing unit, wherein the imaging device comprises:

a substrate having a front surface and a back surface;

a plurality of imaging pixels formed in the front surface of the substrate;

a dielectric layer formed over the back surface of the substrate;

a light shield formed in the dielectric layer;

a through-oxide via (TOV) formed through the dielectric layer, wherein the through-oxide via extends at least partly into the signal processing unit; and

an opaque matrix having openings corresponding to respective imaging pixels in the plurality of imaging pixels, wherein the opaque matrix is also formed in the dielectric layer.

9. The system defined in claim 8 , wherein the light shield and the through-oxide via are formed simultaneously.

10. A system, comprising:

a signal processing unit;

memory;

a lens;

input-output circuitry; and

an imaging device that is stacked on the signal processing unit, wherein the imaging device comprises:

a substrate having a front surface and a back surface;

a plurality of imaging pixels formed in the front surface of the substrate;

a dielectric layer formed over the back surface of the substrate;

a light shield formed in the dielectric layer;

a through-oxide via (TOV) formed through the dielectric layer, wherein the through-oxide via extends at least partly into the signal processing unit; and

color filter array housing structures having walls that are constructed during the formation of the through-oxide via.

11. The system defined in claim 8 , wherein the imaging device further comprises:

an anti-reflective liner formed on the back surface of the substrate; and

a passivation layer that is interposed between the anti-reflective liner and the dielectric layer.

Assignments (5)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2014
From: APTINA IMAGING CORPORATION
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 034673/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 16, 2014
From: BORTHAKUR, SWARNAL; SULFRIDGE, MARC; MOONEY, MITCHELL J.
To: APTINA IMAGING CORPORATION
Reel/Frame 032686/0142 →