IP Library Granted Patent US 9,365,414
Granted Patent B2
US 9,365,414 · App. 14/257,553 · Granted Jun 14, 2016

Sensor package having stacked die

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Quick Facts
Patent No.
US 9,365,414
App. No.
14/257,553
Granted
Jun 14, 2016
Kind
B2
Abstract

A small area semiconductor device package containing two or more MEMS sensor device die and a controller die for the sensor devices is provided. The controller die is mounted on top of the largest MEMS sensor device die (e.g., a gyroscope) and over a second MEMS sensor device die (e.g., an accelerometer). In one embodiment, the controller die is also mounted on the top of the second MEMS sensor device die. In another embodiment, the controller die overhangs the second MEMS sensor device die, which is of a lesser thickness than the first MEMS sensor device die.

Claims (57)

1. A semiconductor device package comprising:

a first semiconductor device die;

a second semiconductor device die;

a controller die, wherein

a first major surface of the controller die is mechanically coupled to an active major surface of the first semiconductor device die,

the first major surface of the controller die extends over an active major surface of the second semiconductor device die;

a first set of wire bonds coupling a first set of contact pads of the controller die to contact pads of the first semiconductor device die; and

a second set of wire bonds coupling a second set of contact pads of the controller die to contact pads of the second semiconductor device die.

2. The semiconductor device package of claim 1 further comprising:

encapsulant over, under, and around the first semiconductor device die, over, under, and around the second semiconductor device die, and over, under, and around the controller die, wherein the encapsulant forms an encapsulated region of the semiconductor device package.

3. The semiconductor device package of claim 2 , wherein

the first and second semiconductor device die are configured with side surfaces approximately in parallel, defining a gap region between the side surfaces, and

the encapsulant is formed in the gap region.

4. The semiconductor device package of claim 3 , wherein

the second semiconductor device die has a same thickness as the first semiconductor device die, and

the first major surface of the controller die is mechanically coupled to the active major surface of the second device die and forms a bridge over the gap region.

5. The semiconductor device package of claim 3 , wherein

the second semiconductor device die has a thickness less than the first semiconductor device die, and

the extent of the controller die over the second semiconductor device die forms a vertical space region between the first major surface of the controller die and the active major surface of the second semiconductor device die.

6. The semiconductor device package of claim 5 , wherein the encapsulant is formed in the vertical space region between the first major surface of the controller die and the active major surface of the second semiconductor device die.

7. The semiconductor device package of claim 1 wherein the first and second semiconductor device die each comprise a microelectromechanical systems (MEMS) device die that is a sensor device.

8. The semiconductor device package of claim 7 , wherein

the sensor device comprises one of a gyroscope, an accelerometer, or a magnetometer, and

the first and second semiconductor device die comprise distinct sensor device types from one another.

9. The semiconductor device package of claim 8 , wherein

the first and second semiconductor device die are configured such that operational axes of the associated sensor devices of the first and second semiconductor device die are in a known relationship to one another.

10. The semiconductor device package of claim 1 further comprising:

one or more leads provided by a lead frame; and

a third set of wire bonds coupling a third set of contact pads of the controller die to corresponding leads of the one or more leads.

11. A method for packaging an electronic device assembly, the method comprising:

providing a carrier;

placing a lead frame on the carrier in an area that comprises an area for the electronic device assembly;

placing a first semiconductor device die on a portion of the lead frame in the area for the electronic device assembly;

placing a second semiconductor device die on another portion of the lead frame in the area for the electronic device assembly, wherein the second semiconductor device die is configured with a side surface substantially in parallel with a side surface of the first semiconductor device die, defining a gap region between the side surfaces;

mechanically coupling a first major surface of a controller die to an active major surface of the first semiconductor device die, wherein the first major surface of the controller die extends over an active major surface of the second semiconductor device die; and

forming a first set of wire bonds coupling a first set of contact pads of the controller die to contact pads of the second semiconductor device die.

12. The method of claim 11 further comprising:

forming an encapsulant over, under, and around the first semiconductor device die, over, under, and around the second semiconductor device die, and over, under, and around the controller die.

13. The method of claim 12 further comprising:

forming the encapsulant in the gap region.

14. The method of claim 13 further comprising:

mechanically coupling the first major surface of the controller die to the active major surface of the second semiconductor device die, wherein

the second semiconductor device die has a same thickness as the first semiconductor device die, and

the controller die forms a bridge between the first and second semiconductor device die over the gap region.

15. The method of claim 13 further comprising:

forming encapsulant in a vertical space region between the first major surface of the controller die and the active major surface of the second semiconductor device die, wherein

the second semiconductor device die has a thickness less than the first semiconductor device die, and

the extent of the controller die over the second semiconductor device die forms the vertical space region.

16. The method of claim 11 wherein the first and second semiconductor device die each comprise a microelectromechanical systems (MEMS) device that is a sensor device.

17. The method of claim 16 , wherein

the sensor device comprises one of a gyroscope, an accelerometer, or a magnetometer, and

the first and second semiconductor device die comprise distinct sensor device types from one another.

18. The method of claim 17 further comprising:

orienting the operational axes of the associated sensor devices of the first and second semiconductor device die in a known relationship to one another.

19. The method of claim 11 , wherein the lead frame has one or more leads, and the method further comprises:

coupling a third set of contact pads of the controller die to corresponding leads of the one or more leads, using corresponding wire bonds.

20. The method of claim 19 , wherein said forming said wire bonds comprises forming wire bonds from one or more of copper and gold.

Assignments (17)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040632 FRAME: 0001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Sep 21, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 044209/0047 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040632/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT OF INCORRECT APPLICATION 14/258,829 PREVIOUSLY RECORDED ON REEL 037444 FRAME 0109. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Aug 10, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039639/0208 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 14/258,829 AND REPLACE ITWITH 14/258,629 PREVIOUSLY RECORDED ON REEL 037444 FRAME 0082. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OFSECURITY INTEREST IN PATENTS. Recorded Aug 10, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039639/0332 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 5, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037444/0109 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 5, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037444/0082 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0903 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Aug 1, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 033460/0337 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Aug 1, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 033462/0293 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Aug 1, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 033462/0267 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 21, 2014
From: BOWLES, PHILIP H.; HOOPER, STEPHEN R.
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 032720/0290 →