Method and apparatus for booting processor
View Patent ↗A fail-safe booting system suitable for a system-on-chip (SOC) automatically detects and rectifies failures in power-on reset (POR) configuration or boot loader fetch operations. If a failure due to a boot loader fetch occurs, a POR configuration and boot loader are fetched from a different non-volatile memory. The reloading takes place from further different non-volatile memory sources if the boot loader fetch fails again. The automated system operates in accordance with a state machine, and does not involve any manual, on-board switch selection or manual re-programming.
1. A An apparatus for booting a processing system, wherein the processing system includes a system memory and at least two memory devices, the at least two memory devices for storing a power-on reset (POR) configuration and a boot loader, the apparatus comprising:
an error detector for detecting a failure of a POR configuration fetch operation and a failure of a boot loader fetch operation; and
a loader, coupled to the error detector, for fetching a POR configuration from one of the at least two memory devices if a failure in a POR fetch operation from another of the at least two memory devices has been detected, and for fetching a boot loader from one of the at least two memory devices if a failure in a boot loader fetch operation from another of the at least two memory devices has been detected, and for transferring the fetched boot loader from the one of the at least two memory devices to the system memory.
2. The apparatus of claim 1 , wherein the loader is arranged to fetch a POR configuration from one of the at least two memory devices if a failure in a boot loader fetch operation from another of the at least two memory devices has been detected.
3. The apparatus of claim 1 , further comprising a storage device for storing a hard-coded POR configuration, and wherein the loader is arranged to fetch the hard-coded POR configuration if failures in POR configuration fetch operations from the at least two memory devices are detected.
4. The apparatus of claim 3 , wherein the storage device contains a hard-coded boot loader.
5. The apparatus of claim 4 , wherein the storage device is a read only memory.
6. The apparatus of claim 1 , wherein the at least two memory devices are non-volatile memories.
7. The apparatus of claim 1 , wherein the error detector and loader are implemented in a state machine.
8. The apparatus of claim 7 , wherein the state machine is arranged to move to an ‘idle’ state during which a fetch operation from a first source is performed, and to subsequently move to an ‘error checking’ state, and if an error is detected in a fetch operation, to revert to the ‘idle’ state during which a further fetch operation from a second source is performed, and to move to a ‘done’ state when no error is detected.
9. An integrated circuit, comprising:
a system memory;
at least two non-volatile memory devices for storing a power-on reset (POR) configuration and a boot loader; and
a state machine for detecting a failure of a POR configuration fetch operation and a failure of a boot loader fetch operation, and for fetching a POR configuration from one of the non-volatile memory devices if a failure in a POR fetch operation from another of the non-volatile memory devices is detected, and for fetching a boot loader from one of the non-volatile memory devices if a failure of a boot loader fetch operation from another of the non-volatile memory devices is detected, and for transferring the fetched boot loader from the one of the non-volatile memory devices to the system memory.
10. The integrated circuit of claim 9 , wherein the state machine is arranged to fetch a POR configuration from one of the at least two memory devices if a failure in a boot loader fetch operation from another of the at least two memory devices has been detected.
11. A method for booting a processing system that includes a system memory and at least two memory devices for storing a power-on reset (POR) configuration and a boot loader, the method comprising:
fetching a POR configuration from one of the at least two memory devices;
detecting a failure of the fetching of the POR configuration;
performing a further POR configuration fetch operation from the other of the at least two memory devices;
fetching a boot loader from one of the at least two memory devices;
detecting a failure of the fetching of the boot loader;
performing a further boot loader fetch operation from the other of the at least two memory devices; and
transferring the fetched boot loader from the one of the at least two memory devices to the system memory.
12. The method of claim 11 , further comprising performing a further POR configuration fetch operation from another of the at least two memory devices on detecting a failure of the boot loader fetch operation.