IP Library Granted Patent US 9,324,675
Granted Patent B2
US 9,324,675 · App. 14/262,381 · Granted Apr 26, 2016

Structures for reducing corrosion in wire bonds

Inventors: Burton J. Carpenter (Austin, TX); Chu-Chung Lee (Round Rock, TX); Tu-Anh N. Tran (Austin, TX)
Assignee: Freescale Semiconductor, Inc.
H01L24/49H01L24/05H01L24/43H01L2224/05624H01L2224/431H01L2224/432H01L2224/4569H01L2224/45124H01L2224/45139H01L2224/45144H01L2224/45147H01L2224/45664H01L2224/45687H01L2224/4845H01L2224/85444
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Quick Facts
Patent No.
US 9,324,675
App. No.
14/262,381
Granted
Apr 26, 2016
Kind
B2
Abstract

A semiconductor structure includes a bond pad and a wire bond coupled to the bond pad. The wire bond includes a bond in contact with the bond pad. The wire bond includes a coating on a surface of the wire bond, and a first exposed portion of the wire bond in a selected location. The wire bond is devoid of the coating over the selected location of the wire bond, and an area of the first exposed portion is at least one square micron.

Claims (36)

1. A semiconductor structure comprising:

a bond pad, and

a wire bond coupled to the bond pad, wherein

the wire bond includes a bond in contact with the bond pad,

the wire bond includes a coating on a surface of the wire bond; and

a first exposed portion of the wire bond in a selected location, wherein

the wire bond is devoid of the coating over the selected location of the wire bond, and

an area of the first exposed portion is at least one square micron;

wherein the wire bond includes one or more exposures in the coating in proximity to the first exposed portion of the wire bond.

2. The semiconductor structure of claim 1 , wherein the one or more exposures are located within a wire bonding tool contact area of the wire bond.

3. The semiconductor structure of claim 1 , wherein the selected location is located outside of a wire bonding tool contact area.

4. The semiconductor structure of claim 1 , wherein the one or more exposures are located outside of a wire bonding tool contact area.

5. The semiconductor structure of claim 1 , wherein the selected location is located within a wire bonding tool contact area.

6. The semiconductor structure of claim 1 , wherein

the wire bond further includes one or more additional coatings,

the semiconductor structure further includes a second exposed portion of the wire bond, and

the wire bond is devoid of the one or more additional coatings over an area of the second exposed portion.

7. The semiconductor structure of claim 1 , wherein

the semiconductor structure further includes a plurality of wire bonds and a plurality of exposed portions,

each of the plurality of wire bonds includes at least one of the plurality of exposed portions, and

the plurality of exposed portions are aligned along an edge of the semiconductor structure.

8. The semiconductor structure of claim 1 , wherein

the first exposed portion is located to attract corrosive elements way from in proximity to the first exposed portion are located to attract corrosive elements away from the one or more exposures in the coating in proximity to the first exposed portion of the wire bond.

9. The semiconductor structure of claim 1 , wherein

the one or more exposures in the coating in proximity to the first exposed portion of the wire bond are unintentionally created by a bonding tool during the wire bonding process; and

the first exposed portion is intentionally created after the wire bonding process.

10. A semiconductor structure comprising:

a plurality of bond pads aligned along an edge of the semiconductor structure, and

a plurality of wire bonds coupled to the plurality of bond pads, wherein

each of the plurality of wire bonds includes a bond in contact with one of the plurality of bond pads, and

each of the plurality of wire bonds includes a coating on a respective wire bond surface; and

a plurality of exposed portions within a selected area, wherein

the selected area spans across the plurality of wire bonds in a direction along the edge of the semiconductor structure,

each of the plurality of wire bonds includes at least one exposed portion of the plurality of exposed portions, and

each of the plurality of wire bonds is devoid of the coating over the at least one exposed portion,

wherein the semiconductor structure further includes one or more additional exposed portions, wherein the wire bond is devoid of the coating over the one or more additional exposed portions.

Assignments (17)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040632 FRAME: 0001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Sep 21, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 044209/0047 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040632/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 14/258,829 AND REPLACE ITWITH 14/258,629 PREVIOUSLY RECORDED ON REEL 037444 FRAME 0082. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OFSECURITY INTEREST IN PATENTS. Recorded Aug 10, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039639/0332 →
CORRECTIVE ASSIGNMENT OF INCORRECT APPLICATION 14/258,829 PREVIOUSLY RECORDED ON REEL 037444 FRAME 0109. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Aug 10, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039639/0208 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 5, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037444/0082 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 5, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037444/0109 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0903 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Aug 1, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 033462/0293 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Aug 1, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 033462/0267 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Aug 1, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 033460/0337 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 25, 2014
From: CARPENTER, BURTON J.; LEE, CHU-CHUNG; TRAN, TU-ANH N.
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 032761/0649 →
Continuity (1)
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