IP Library Granted Patent US 9,161,028
Granted Patent B2
US 9,161,028 · App. 14/279,097 · Granted Oct 13, 2015

Image sensors with dark pixels for real-time verification of imaging systems

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Quick Facts
Patent No.
US 9,161,028
App. No.
14/279,097
Granted
Oct 13, 2015
Kind
B2
Abstract

An imaging system may include an array of image pixels. The array of image pixels may be provided with one or more rows and columns of optically shielded dark image pixels. The dark image pixels may be used to produce verification image data that follows the same pixel-to-output data path of light-receiving pixels. The output signals from dark pixels may be continuously or intermittently compared with a set of expected output signals to verify that the imaging system is functioning properly. In some arrangements, verification image data may include a current frame number that is encoded into the dark pixels. The encoded current frame number may be compared with an expected current frame number. In other arrangements, dark pixels may be configured to have a predetermined pattern of conversion gain levels. The output signals may be compared with a “golden” image or other predetermined set of expected output signals.

Claims (29)

1. An image sensor, comprising:

an array of image pixels having a plurality of light-receiving image pixels and a plurality of dark image pixels that are optically shielded, wherein each dark image pixel has floating diffusion node with a floating diffusion capacitance that receives a test signal via capacitive coupling to an associated signal node, wherein the floating diffusion capacitance of each dark image pixel is set to a predetermined level, and wherein the predetermined level of floating diffusion capacitance of a first dark image pixel is different than the predetermined level of floating diffusion capacitance of a second dark image pixel.

2. The image sensor defined in claim 1 wherein each dark image pixel includes adjustable conversion gain circuitry, wherein the adjustable conversion gain circuitry includes a capacitor, and wherein the capacitor of the first dark image pixel has a different capacitance than the capacitor of the second dark image pixel.

3. The image sensor defined in claim 2 wherein the plurality of dark image pixels form a block of dark image pixels, wherein the block comprises a block selected from the group consisting of: a row and a column, and wherein the capacitances of the capacitors increase incrementally from one end of the block of dark image pixels to another end of the block of dark image pixels.

4. The image sensor defined in claim 1 wherein each dark image pixel includes adjustable conversion gain circuitry, wherein each dark image pixel is operable in one of a first conversion gain mode and a second conversion gain mode, wherein the first dark image pixel is set to operate in the first conversion gain mode, and wherein the second dark image pixel is set to operate in the second conversion gain mode.

5. The image sensor defined in claim 4 wherein the first dark image pixel is one of a first plurality of dark image pixels that are set to operate in the first conversion gain mode, wherein the second dark image pixel is one of a second plurality of dark image pixels that are set to operate in the second conversion gain mode, wherein the first conversion gain mode represents a bit one value, wherein the second conversion gain mode represents a bit zero value, and wherein the first and second pluralities of dark image pixels are together operable to encode a current frame number within the bit one and zero values.

6. A method of operating an imaging system having an image sensor that includes image readout circuitry and first and second optically shielded dark image pixels, wherein the first and second optically shielded dark image pixels have respective first and second floating diffusion capacitances and wherein the first and second floating diffusion capacitances are different, the method comprising:

injecting a test signal into a floating diffusion node of the first optically shielded dark image pixel via capacitive coupling to a first associated signal node;

injecting the test signal into a floating diffusion node of the second optically shielded dark image pixel via capacitive coupling to a second associated signal node; and

with the image readout circuitry, reading first and second output signals associated with the test signal from the respective floating diffusion nodes of the first and second optically shielded dark image pixels.

7. The method of claim 6 further comprising:

with the image processing circuitry, receiving the first and second output signals; and

with the image processing circuitry, comparing the first and second output signals with expected output signals.

8. The method of claim 7 further comprising:

with the image processing circuitry, providing a result of the comparison of the first and second output signals with the expected output signals to external circuitry.

9. A method of operating an imaging system having image processing circuitry and an image sensor that includes pixel encoding circuitry, image readout circuitry, and a plurality of optically shielded image pixels, comprising:

with the pixel encoding circuitry, encoding verification image data into the plurality of optically shielded image pixels, wherein encoding the verification image data into the plurality of optically shielded image pixels comprises injecting test signals into the plurality of optically shielded image pixels and encoding a current frame number into the plurality of optically shielded image pixels.

10. The method defined in claim 9 further comprising:

with the image readout circuitry, reading the verification image data out of the plurality of optically shielded image pixels.

11. The method defined in claim 10 further comprising:

with the image processing circuitry, receiving and processing the read out verification image data, wherein processing the read out verification image data comprises decoding the current frame number.

12. The method defined in claim 11 further comprising:

with the image processing circuitry, comparing the decoded current frame number with an expected current frame number.

13. The method defined in claim 12 , further comprising:

with the image processing circuitry, providing a result of the comparison of the decoded current frame number with the expected current frame number to external circuitry.

14. The method defined in claim 9 wherein injecting the test signals into the plurality of optically shielded pixels comprises injecting a range of voltages into the plurality of optically shielded pixels.

15. The method defined in claim 14 wherein the range of voltages corresponds to the current frame number.

16. The method defined in claim 9 wherein each optically shielded image pixel includes a floating diffusion node and wherein injecting the test signals into the plurality of optically shielded image pixels comprises injecting each test signal into an associated floating diffusion node.

17. The method defined in claim 16 wherein injecting each test signal into the associated floating diffusion node comprises injecting each test signal into the associated floating diffusion node via capacitive coupling.

Assignments (5)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 038620, FRAME 0087 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE INCORRECT PATENT NUMBER 5859768 AND TO RECITE COLLATERAL AGENT ROLE OF RECEIVING PARTY IN THE SECURITY INTEREST PREVIOUSLY RECORDED ON REEL 038620 FRAME 0087. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Aug 25, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 039853/0001 →
SECURITY INTEREST Recorded Apr 15, 2016
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 038620/0087 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2014
From: APTINA IMAGING CORPORATION
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 034673/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 12, 2014
From: SOLHUSVIK, JOHANNES; CROOK, NEAL
To: APTINA IMAGING CORPORATION
Reel/Frame 034488/0838 →