IP Library Granted Patent US 9,070,878
Granted Patent B2
US 9,070,878 · App. 14/283,714 · Granted Jun 30, 2015

Pinched center resistive change memory cell

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Quick Facts
Patent No.
US 9,070,878
App. No.
14/283,714
Granted
Jun 30, 2015
Kind
B2
Abstract

The present invention is a method for forming a vertically oriented element having a narrower area near its center away from either end. The present invention will find applicability in other memory cell structures. The element will have a narrow portion towards its center such that current density will be higher away from the ends of the element. In this way, the heating will occur away from the ends of the storage element. Heating in a phase-change or resistive change element leads to end of life conditions, including the condition whereby contaminants from the end point contacts are enabled to migrate away from the end point and into the storage element thereby contaminating the storage element material and reducing its ability to be programmed, erased and/or read back. By keeping the greatest heating towards the center of the element where it is surrounded by more of the same material and away from the ends of the element where end point contact material can be heated and potentially activated, the lifetime of the element will be increased.

Claims (25)

1. A method of forming a memory cell, the method comprising:

providing a substrate comprising one or more dielectric materials;

forming, within the substrate, an information storage element, the information storage element comprising a programmable data-storage material shaped to define (i) a first end region, (ii) a center region disposed over the first end region, and (iii) a second end region disposed over the center region,

wherein (i) a cross-sectional area of the center region is smaller than a cross-sectional area of the first end region, (ii) the cross-sectional area of the center region is smaller than a cross-sectional area of the second end region, (iii) the data-storage material comprises a phase-change material or a resistive-change material, and (iv) the data-storage material is configured for programmability such that (a) a current density within the center region is larger than a current density within the first end region and (b) the current density within the center region is larger than a current density within the second end region.

2. The method of claim 1 , wherein forming the information storage element comprises:

depositing programmable data-storage material within a cup defined by the substrate to form the first end region;

forming a spacer on a sidewall of the cup over the first end region;

depositing programmable data-storage material within the cup proximate the spacer to form the center region; and

depositing programmable data-storage material over the center region to form the second end region.

3. The method of claim 2 , wherein the spacer comprises a dielectric material.

4. The method of claim 3 , wherein the spacer comprises silicon nitride.

5. The method of claim 1 , wherein forming the information storage element comprises:

removing a portion of the substrate to form a cup, the portion of the substrate comprising (i) a first dielectric material, (ii) disposed above the first dielectric material, a second dielectric material different from the first dielectric material, and (iii) disposed above the second dielectric material, a third dielectric material different from the second dielectric material, the portion of the cup intersecting the second dielectric material having a cross-sectional area smaller than portions of the cup interesting the first or third dielectric materials; and

depositing programmable data-storage material within the cup to form the information storage element.

6. The method of claim 5 , wherein the first dielectric material and the third dielectric material are the same material.

7. The method of claim 5 , wherein the second dielectric material is a nitride material and the first and third dielectric materials are oxide materials.

8. The method of claim 7 , wherein the second dielectric material comprises silicon nitride and the first and third dielectric materials comprise silicon dioxide.

9. The method of claim 1 , wherein the substrate comprises one or more dielectric materials disposed over a semiconductor wafer.

10. The method of claim 1 , further comprising, before forming the information storage element, forming a liner material on a sidewall of a cup defined by the substrate, at least a portion of the information storage element being surrounded by the liner material after formation of the information storage element.

11. The method of claim 10 , wherein the liner material comprises a metal.

12. The method of claim 10 , wherein the liner material comprises titanium.

13. The method of claim 1 , wherein the data-storage material comprises a phase-change material.

14. The method of claim 13 , wherein the phase-change material comprises a chalcogenide material.

15. The method of claim 1 , wherein the data-storage material comprises a resistive-change material.

16. The method of claim 1 , further comprising forming a current-steering element within the substrate, wherein (i) the information storage element is disposed over the current-steering element, and (ii) the data-storage material is configured for programmability via the current-steering element.

Assignments (7)
RELEASE OF SECURITY INTEREST AT REEL 039389 FRAME 0684 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058965/0535 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2018
From: HGST, INC.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 046939/0587 →
RELEASE OF SECURITY INTEREST Recorded Aug 16, 2016
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: HGST, INC.
Reel/Frame 039689/0950 →
SECURITY AGREEMENT Recorded Jul 19, 2016
From: HGST, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 039389/0684 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NAME AND ADDRESS OF THE ASSIGNEE PREVIOUSLY RECORDED ON REEL 035748 FRAME 0909. ASSIGNOR(S) HEREBY CONFIRMS THE NAME AND ADDRESS OF THE ASSIGNEE SI HGST, INC.,3403 YERBA BUENA ROAD,SAN JOSE, CA 95135. Recorded Jun 2, 2015
From: CONTOUR SEMICONDUCTOR, INC.
To: HGST, INC.
Reel/Frame 035831/0594 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 21, 2015
From: CONTOUR SEMICONDUCTOR, INC.
To: HGST NETHERLANDS B.V.
Reel/Frame 035748/0909 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2014
From: SHEPARD, DANIEL R.
To: CONTOUR SEMICONDUCTOR, INC.
Reel/Frame 033172/0539 →