IP Library Patent Application 14286253
Patent Application
App. No. 14/286,253

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

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Quick Facts
Patent No.
US None
App. No.
14/286,253
Abstract

A semiconductor device includes a first moisture-resistant ring disposed in a peripheral region surrounding a circuit region on a semiconductor substrate in such a way as to surround the circuit region and a second moisture-resistant ring disposed in the peripheral region in such a way as to surround the first moisture-resistant ring.

Claims (32)

1 . A method for manufacturing a semiconductor device, comprising:

forming a first insulating layer on a semiconductor substrate;

forming a first groove, which surrounds a circuit region on the semiconductor substrate, and a second groove, which surrounds the first groove, in the first insulating layer in a peripheral region surrounding the circuit region;

burying a first pattern, which serves as a part of a first moisture-resistant ring, into the first groove and burying a second pattern, which serves as a part of a second moisture-resistant ring, into the second groove;

forming a second insulating layer on the first insulating layer, the first pattern, and the second pattern;

forming a third groove, which reaches the first pattern and which has a width smaller than that of the first pattern, and a fourth groove, which reaches the second pattern and which has a width smaller than that of the second pattern, in the second insulating layer;

burying a third pattern, which serves as a part of the first moisture-resistant ring, into the second groove and burying a fourth pattern, which serves as a part of the second moisture-resistant ring, into the fourth groove; and

forming a fifth pattern, which is connected to the third pattern, in which at least one of two side portions along the longitudinal direction do not overlap the first pattern two-dimensionally, and which serves as a part of the first moisture-resistant ring, and in addition, forming a sixth pattern, which is connected to the fourth pattern, in which at least one of two side portions along the longitudinal direction do not overlap the second pattern two-dimensionally, which serves as a part of the second moisture-resistant ring, and which is isolated from the fifth pattern, on the second insulating layer.

2 . The method for manufacturing a semiconductor device according to claim 1 ,

wherein the two side portions of the fifth pattern do not overlap the first pattern two-dimensionally, and

the two side portions of the sixth pattern do not overlap the second pattern two-dimensionally.

3 . The method for manufacturing a semiconductor device according to claim 1 ,

wherein the width of the fifth pattern is larger than the width of the first pattern, and

the width of the sixth pattern is larger than the width of the second pattern.

4 . The method for manufacturing a semiconductor device according to claim 1 ,

wherein the burying of the first pattern and the second pattern comprises the steps of forming a first electrically conductive film containing copper into the first groove, into the second groove, and on the first insulating layer; and burying the first pattern formed from the first electrically conductive film into the first groove and burying the second pattern formed from the first electrically conductive film into the second groove by polishing the first electrically conductive film until the surface of the first insulating layer is exposed, and

the forming of the second insulating layer comprises the step of forming a SiC film in contact with the first pattern and the second pattern.

5 . The method for manufacturing a semiconductor device according to claim 1 ,

wherein in the forming of the first groove and the second groove, the first groove, in which the width of an upper portion is larger than the width of a lower portion, and the second groove, in which the width of an upper portion is larger than the width of a lower portion, are formed, and

in the burying of the first pattern and the second pattern into the first insulating layer, the first pattern, in which the width of the upper portion is larger than the width of the lower portion, and the second pattern, in which the width of the upper portion is larger than the width of the lower portion, are buried into the first insulating layer.

6 . The method for manufacturing a semiconductor device according to claim 1 ,

wherein in the forming of the first groove and the second groove, a fifth groove is further formed in the first insulating layer in the circuit region,

in the burying of the first pattern and the second pattern, an wiring is further buried in the fifth groove,

in the forming of the third groove and the fourth groove, a contact hole reaching the wiring is further formed in the second insulating layer in the circuit region,

in the burying of the third pattern and the fourth pattern, an electrically conductive plug is further buried in the contact hole, and

in the forming of the fifth pattern and the sixth pattern, an electrode pad connected to the electrically conductive plug is further formed on the second insulating layer in the circuit region.

7 . The method for manufacturing a semiconductor device according to claim 1 , further comprising:

flattening the surface of the second insulating layer through polishing after the forming of the second insulating layer and before the forming of the third groove and the fourth groove.

8 . The method for manufacturing a semiconductor device according to claim 1 ,

wherein the forming of the third pattern and the fourth pattern comprises the steps of forming a second electrically conductive film into the third groove, into the fourth groove, and on the second insulating layer, and burying the third pattern formed from the second electrically conductive film into the third groove and, in addition, burying the fourth pattern formed from the second electrically conductive film into the fourth groove by polishing the second electrically conductive film until the surface of the second insulating layer is exposed.

9 . The method for manufacturing a semiconductor device according to claim 1 ,

wherein the forming of the fifth pattern and the sixth pattern comprises the steps of forming a third electrically conductive film on the third pattern, on the fourth pattern, and on the second insulating layer, and forming the fifth pattern formed from the third electrically conductive film and the sixth pattern formed from the third electrically conductive film by etching the third electrically conductive film.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 7, 2016
From: SOCIONEXT INC.
To: MIE FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 040589/0163 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 17, 2015
From: FUJITSU SEMICONDUCTOR LIMITED
To: SOCIONEXT INC.
Reel/Frame 035453/0904 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 3RD ASSIGNOR'S NAME PREVIOUSLY RECORDED ON REEL 032957 FRAME 0737. ASSIGNOR(S) HEREBY CONFIRMS THE CORRECT ASSIGNOR'S NAME AS FOLLOWS: OHSHIMA, TADASHI. Recorded Aug 25, 2014
From: SAKUMA, JUN; MATSUMURA, HIDEAKI; OHSHIMA, TADASHI
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 033648/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 23, 2014
From: SAKUMA, JUN; MATSUMURA, HIDEAKI; OSHIMA, TADASHI
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 032957/0737 →