Semiconductor devices that include a die bonded to a substrate with a gold interface layer
View Patent ↗Embodiments of a semiconductor device include a primary portion of a substrate, a die, and a die attach layer between the die and the primary portion of the substrate. The die attach layer includes a gold interface layer that includes gold and a plurality of first precipitates in the gold. Each of the first precipitates includes a combination of nickel, cobalt, palladium, gold, and silicon.
1. A semiconductor device comprising:
a primary portion of a substrate;
a die; and
a die attach layer between the die and the primary portion of the substrate, the die attach layer comprising a gold interface layer that includes gold and a plurality of first precipitates in the gold, wherein each of the plurality of first precipitates comprises a combination of nickel, cobalt, palladium, gold, and silicon.
2. The semiconductor device according to claim 1 , further comprising:
a nickel-containing barrier layer between the die attach layer and the primary portion of the substrate.
3. The semiconductor device according to claim 2 , wherein the nickel-containing barrier layer has a thickness in a range of 1 to 10 microns.
4. The semiconductor device according to claim 2 , wherein the die attach layer comprises a nickel-containing silicide layer between the gold interface layer and the nickel-containing barrier layer.
5. The semiconductor device according to claim 4 , wherein the nickel-containing silicide layer comprises a nickel cobalt silicide layer.
6. The semiconductor device according to claim 4 , wherein the nickel-containing silicide layer comprises a nickel silicide layer.
7. The semiconductor device according to claim 4 , wherein the nickel-containing silicide layer has a thickness of less than 0.2 micron.
8. The semiconductor device according to claim 1 , wherein the gold interface layer has a thickness in a range of 0.1 to 10 microns.
9. The semiconductor device according to claim 1 , wherein the first precipitates are spherical or elliptical and can have a diameter of 0.1 micron.
10. The semiconductor device according to claim 1 , wherein the gold interface layer further comprises second precipitates of nickel cobalt silicide.
11. The semiconductor device according to claim 10 , wherein the second precipitates are formed as strings that can have a length of 0.2 micron.
12. The semiconductor device according to claim 10 , wherein the gold interface layer further comprises third precipitates of silicon.
13. The semiconductor device according to claim 12 , wherein the second precipitates and the third precipitates total less than 10 percent of a volume of the gold interface layer.
14. The semiconductor device according to claim 1 , wherein the first precipitates form between 5 and 70 percent of a volume of the gold interface layer.
15. The semiconductor device according to claim 1 , wherein the primary portion of the substrate is formed from a material selected from copper, copper molybdenum copper (CuMoCu), Cu(CuMo)Cu, aluminum, silicon carbide, and ceramic.
16. The semiconductor device according to claim 1 , wherein a backside of the die comprises silicon.
17. The semiconductor device according to claim 1 , wherein the gold interface layer is in contact with a silicon portion of the die.
18. A packaged semiconductor device comprising:
a primary portion of a substrate;
a silicon-containing die;
a die attach layer between the silicon-containing die and the primary portion of the substrate, the die attach layer comprising a gold interface layer that includes gold and a plurality of first precipitates in the gold, wherein each of the plurality of first precipitates comprises a combination of nickel, cobalt, palladium, gold, and silicon;
a plurality of leads; and
a plurality of wirebonds electrically connecting the silicon-containing die and the plurality of leads.
19. The packaged semiconductor device according to claim 18 , wherein the primary portion of the substrate is conductive.
20. The packaged semiconductor device according to claim 19 , further comprising:
insulating layers between the primary portion of the substrate and the plurality of leads.