IP Library Granted Patent US 9,442,501
Granted Patent B2
US 9,442,501 · App. 14/287,395 · Granted Sep 13, 2016

Systems and methods for a low dropout voltage regulator

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Quick Facts
Patent No.
US 9,442,501
App. No.
14/287,395
Granted
Sep 13, 2016
Kind
B2
Abstract

A semiconductor device including a voltage regulator is disclosed. The voltage regulator may include a multipath amplifier stage, a driver stage coupled to the multipath amplifier stage, a dynamic compensation circuit coupled to the multipath amplifier stage, and a current compensation circuit. The dynamic compensation circuit may be operable to provide a varying level of compensation to the multipath amplifier stage, where the varying level of compensation proportional to a current level associated with the load; and the current compensation circuit may be operable to allow a minimum current level at the driver stage.

Claims (40)

1. A voltage regulator comprising:

a single substrate including circuitry to implement:

a first amplifier stage operable to provide a first gain level at a first bandwidth;

a second amplifier stage coupled to the first amplifier stage, the second amplifier stage operable to provide a second gain level at a second bandwidth, wherein the first gain level is higher than the second gain level, and the second bandwidth is higher than the first bandwidth;

a dynamic compensation circuit coupled to an output of the second amplifier stage, the dynamic compensation circuit operable to provide a varying level of compensation to the second amplifier stage, the varying level of compensation proportional to a current level associated with a load; and

a current compensation circuit coupled to an output of a third amplifier stage, the current compensation circuit operable to allow a minimum current level at the third amplifier stage, the third amplifier stage coupled to the first and second amplifier stages.

2. The voltage regulator of claim 1 , wherein the minimum current level is constant.

3. The voltage regulator of claim 1 , wherein the minimum current level is a function of the load.

4. The voltage regulator of claim 1 , wherein the dynamic compensation circuit comprises a transistor having a gate voltage modulated by a current level associated with the third amplifier stage.

5. The voltage regulator of claim 1 , wherein the output of the third amplifier stage is coupled directly to an output pin of the single substrate.

6. The voltage regulator of claim 1 , wherein the load is formed on the single substrate.

7. The voltage regulator of claim 1 , wherein the direct voltage gain of the voltage regulator is greater than forty decibels.

8. The voltage regulator of claim 1 , wherein the voltage regulator is responsive to a direct current equivalent load within the range of two to five hundred milliamps (2-500 mA).

9. The voltage regulator of claim 1 , wherein an equivalent capacitance coupled to an output of the voltage regulator is within the range of five to one hundred nanofarads (5-100 nF).

10. The voltage regulator of claim 1 , wherein the voltage regulator is operable to provide a phase margin greater than thirty degrees.

11. The voltage regulator of claim 1 , wherein the current compensation circuit comprises:

a first transistor of the first type having a first current electrode coupled to a first electrode of a resistor, a control electrode coupled to a bias voltage, and a second current electrode coupled to a first supply voltage;

a capacitor coupled in parallel between a second electrode of the resistor and a second supply voltage; and

a first transistor of a second type having a first current electrode coupled to an input voltage, a control electrode coupled to the second electrode of the resistor, and a second current electrode coupled to the second supply voltage.

12. The voltage regulator of claim 1 , wherein the dynamic compensation circuit comprises:

a first transistor of a first type having a first current electrode coupled to an output of the second amplifier stage, a second current electrode coupled to a source voltage; and

a second transistor of the first type having a first current electrode coupled to the source voltage, and a second current electrode and a control electrode coupled to: one another, and a control electrode of the first transistor of the first type.

13. A semiconductor device comprising:

a load;

a voltage regulator coupled to the load, the voltage regulator comprising:

a multipath amplifier stage;

a driver stage coupled to the multipath amplifier stage;

a dynamic compensation circuit coupled to the multipath amplifier stage, the dynamic compensation circuit operable to provide a varying level of compensation to the multipath amplifier stage, the varying level of compensation proportional to a current level associated with the load; and

a current compensation circuit coupled between the load and the input to the multipath amplifier stage, the current compensation circuit operable to provide a minimum current level at the driver stage and includes:

a first transistor of the first type having a first current electrode coupled to an input signal and a first electrode of a resistor, a control electrode coupled to a bias voltage, and a second current electrode coupled to a first supply voltage;

a capacitor coupled in parallel between a second electrode of the resistor and the first supply voltage; and

a first transistor of a second type having a first current electrode coupled to an input voltage, a control electrode coupled to the second electrode of the resistor, and a second current electrode coupled to a second supply voltage.

14. The semiconductor device of claim 13 , wherein the load and the voltage regulator are formed on the same substrate.

15. The semiconductor device of claim 13 , wherein an output of the driver stage is an output of the semiconductor device.

16. The semiconductor device of claim 13 , wherein the minimum current level is constant.

17. The semiconductor device of claim 13 , wherein the minimum current level is a function of the load.

18. The semiconductor device of claim 13 , wherein the dynamic compensation circuit comprises a transistor coupled to a compensation resistor, the transistor having a gate voltage modulated by a current level associated with a third amplifier stage.

19. The semiconductor of claim 13 , wherein the dynamic compensation circuit comprises:

a first transistor of a first type having a first current electrode coupled to an output of the multipath amplifier stage, a second current electrode coupled to a source voltage; and

a second transistor of the first type having a first current electrode coupled to the source voltage, and a second current electrode and a control electrode coupled to: one another, a control electrode of the first transistor of the first type, and an input signal.

Assignments (16)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
MERGER Recorded Jan 3, 2017
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 041144/0363 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 14/258,829 AND REPLACE ITWITH 14/258,629 PREVIOUSLY RECORDED ON REEL 037444 FRAME 0082. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OFSECURITY INTEREST IN PATENTS. Recorded Aug 10, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039639/0332 →
CORRECTIVE ASSIGNMENT OF INCORRECT APPLICATION 14/258,829 PREVIOUSLY RECORDED ON REEL 037444 FRAME 0109. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Aug 10, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039639/0208 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 5, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037444/0109 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 5, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037444/0082 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0903 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Aug 1, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 033460/0337 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Aug 1, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 033462/0293 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Aug 1, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 033462/0267 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2014
From: PIETRI, STEFANO; DAO, CHRIS C.; VILAS BOAS, ANDRE LUIS
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 032965/0179 →