Granted Patent B1

US 9,100,115 · App. 14/288,525 · Granted Aug 4, 2015

Abstract

Claims (91)

1. A processor unit for determining a quality indicator, QI, of a communication channel, comprising:

an input for receiving received complex values consisting of a real part and an imaginary part and representing a determined value of a modulated parameter of a received signal transmitted over the communication channel,

the modulated parameter being modulated according to a digital modulation scheme using a mapping of a digital value on a mapped complex value out of a constellation set, the constellation set being discrete and containing at least two predetermined complex values, each corresponding to a specific value of the modulated parameter, each predetermined complex value being located in a respective one of at least two regions in complex space, the region being without other predetermined complex values, and modulation of the parameter with the specific value corresponding to the mapped complex value;

the processor unit further comprising:

transformation logic circuitry connected to the input and arranged to perform a predetermined sequence of transformations on the received complex values to obtain processed received complex values, which transfer all the received complex values on which the sequence of transformations is performed into a single predetermined region out of said at least two regions, the predetermined region containing a single target location in complex space corresponding to one of the at least two predetermined complex values in the constellation set, the transformations being one or more of the group consisting of: absolute value calculation, complex number multiplication, complex number subtraction;

estimation logic circuitry arranged to determine the error vector magnitude, EVM, as an average of the distance of the processed received complex symbols to the single target location; and

an output for outputting data representing the quality indicator, QI, determined using the determined error vector magnitude, EVM.

2. A processor unit as claimed in claim 1 , wherein the transformations comprise:

modifying a sign of a real part and/or a sign of an imaginary part of the received complex values; and/or

moving each received complex value by a complex amount;

wherein the modifying changes a pattern of regions in which the received complex values are located, so that the received complex values in a first region are transferred to a second region.

3. A processor unit according to claim 2 , wherein the modifying comprises:

modifying the sign of the imaginary part of a respective received complex value if the sign differs from the sign of the imaginary part of the predetermined complex value in the second region unless the predetermined complex value in the second region is located on the real axis, and

modifying the sign of the real part of a respective complex value if the sign differs from the sign of the real part of the predetermined complex value in the second region unless the predetermined complex value in the second region is located on the imaginary axis.

4. A processor unit as claimed in claim 1 , wherein the predetermined complex values are distributed along a circumference having a centre at the origin of the complex plane, and wherein the moving is rotating along the circumference.

5. A processor unit as claimed in claim 1 , wherein the predetermined complex values are distributed in the complex plane in a regular pattern with a first predetermined pitch in a direction of the real axis and a second predetermined pitch in another direction of the imaginary axis, and wherein the predetermined complex amount has a real part which is a multiple integer of the first predetermined pitch, and an imaginary part which is multiple integer of the second predetermined pitch so as to move the pattern to be symmetric to both the real axis and the imaginary axis.

6. A processor unit as claimed in claim 1 , wherein the single target location is at a predetermined offset from one of the at least two predetermined complex values.

7. A processor unit as claimed in claim 1 , wherein the estimation logic circuitry is further arranged to:

execute a series sum of a modulus raised to the power of two of a difference of each one of the processed received complex values with a further complex amount corresponding to the single target location; and

divide said series sum by another series sum of a module raised to the power of two of each one of the processed received complex values around said single particular location.

8. A processor unit as claimed in claim 1 , wherein the digital modulation scheme is an M-order phase shift keying digital modulation having M predetermined complex values, and wherein the predetermined sequence of transformations comprises:

k−1 times the modifying the sign, and

k−2 times the rotating,

wherein k is a positive integer larger than 1 and M=2 k , and wherein each one of the k−2 times the rotating is executed after a modifying the sign.

9. A processor unit as claimed in claim 8 , wherein the single target location has a positive real part and a positive imaginary part, and wherein:

the k−1 times modifying the sign comprises computing the modules of the real part and the imaginary part of each of the received complex values to obtain, after each of the k−1 operations of modifying the sign, to move the received complex values into

M

2

i

regions, i being an integer and 1≦i<k, and

the k−2 times rotating each complex value comprises computing a multiplication of each one of the respective received complex values by the complex amount

ⅇ

-

j

⁢

2

⁢

⁢

π

M

to obtain a rotation of each one of said respective received complex value by

-

2

⁢

⁢

π

M

.

10. A processor unit as claimed in claim 1 , wherein the digital modulation is an M-order quadrature amplitude modulation, and wherein the sequence of transformations comprises:

n times modifying the sign, and

n−1 times moving,

wherein n is a positive integer and M=4 n , and wherein each of the n−1 times moving is executed after one of the n times modifying the sign.

11. A processor unit as claimed in claim 10 , wherein the single target location has a positive real part and a positive imaginary part, wherein the first predetermined pitch is equivalent to the second predetermined pitch, and wherein:

the n times modifying the sign comprises computing the modules of the real part and the imaginary part of each of the received complex values to obtain after each of the n times modifying the sign, to move the received complex values into

M

2

i

regions, being an integer and 1≦i<n, and

the n−1 times moving each symbols comprises a subtraction of each of the received complex symbols by

M

2

n

+

i

⁢

(

1

+

j

)

,

wherein the first predetermined pitch or second predetermined pitch is equivalent to 2 times the real part of the predetermined complex value with the smallest real part.

12. A processor unit as claimed in claim 1 , wherein the M-order digital modulation scheme is 2-order phase shift keying, and wherein the predetermined sequence of transformations consists of one time modifying the sign of the real part.

13. A processor unit as claimed in claim 12 , wherein the single target location has a positive real part and zero imaginary part, and wherein:

the one time modifying the sign comprises computing the modulus of the real part of each one of the received complex value to transfer after the one time the modifying the sign, the received complex values to the single predetermined region.

14. A receiver, comprising:

a transducer for receiving a modulated signal over a communication channel and converting the modulated signal into a signal processable in the receiver;

a demodulator connected to the transducer, for determining from the modulated signal a value of a modulated parameter of the signal, and outputting a received complex value representing the determined value;

a processor unit as claimed in claim 1 connected to the demodulator, for determining a quality indicator, QI, of the communication channel from a sequence of received complex values.

15. A digital communications system, comprising a receiver as claimed in claim 14 and further comprising a transmitter and the communication channel, wherein the transmitter is arranged to transmit information from the transmitter to the receiver through the communication channel.

16. A method of determining a quality indicator, QI, of a communication channel, comprising:

receiving data representing received complex values, the received complex values consisting of a real part and an imaginary part, representing a determined value of a modulated parameter of a received signal transmitted over the communication channel, the modulated parameter being modulated according to a digital modulation scheme, the digital modulation scheme using:

a mapping of a digital value on a mapped complex value out of a constellation set, the constellation set being discrete and containing at least two predetermined complex values, each predetermined complex value corresponding to a specific value of the modulated parameter, each predetermined complex value being located in a respective one of at least two regions in complex space, the region being without other predetermined complex values, and modulation of the parameter with the specific value corresponding to the mapped complex value;

executing a predetermined sequence of transformations on the received complex values to obtain processed received complex values in a single predetermined region containing a single target location, the transformations being one or more of the group consisting of: absolute value calculation, complex number multiplication, complex number subtraction;

computing an average distance of all the processed received complex symbols to the single target location to obtain the error vector magnitude, EVM;

computing the quality indicator from the determined EVM;

outputting data representing the quality indicator.

17. The method as claimed in claim 16 , wherein the executing the predetermined sequence of transformations comprises:

modifying a sign of a real part and/or a sign of an imaginary part of the received complex values to change a pattern of regions in which respective received complex values are located so that the respective received complex values in a first region are transferred to a second region, and/or

moving each received complex symbol by a complex amount.

18. A non-transitory computer readable medium embodying a computer program comprising instructions for causing a processor unit to perform the method as claimed in claim 17 .

Assignments (17)