High speed overlay mode for burst data and real time streaming (audio) applications
View Patent ↗A wireless communication system for demodulating data packets includes an interface circuit and a modem circuit. The interface circuit may receive a data packet, and the demodulator circuit may demodulate a first part of the data packet by dispreading only selected data bits in the data packet. The demodulator circuit may separately process at least a data payload portion of the data packet without dispreading.
1. A data reception method comprising:
receiving a wireless signal that conveys a plurality of data packets by a wireless receiving device;
detecting a preamble sequence of a synchronization header for a given data packet of the plurality of data packets;
establishing an initial time synchronization dependent upon detection of the preamble sequence included in the synchronization header;
determining if the given data packet of the plurality of data packets is a high-speed data packet dependent upon a predetermined value of a start of frame delimiter included in the synchronization header;
demodulating the synchronization header of the given data packet using a despreading process in response to determining that the given data packet is a high-speed data packet; and
separately demodulating a data payload portion of the given data packet using a non-dispreading process in response to determining that the given data packet is a high-speed data packet.
2. The data reception method of claim 1 , where demodulating the synchronization header of the given data packet comprises despreading the synchronization header in accordance with IEEE 802.15.4 protocol.
3. The data reception method of claim 2 , further comprising determining the initial synchronization in accordance with the IEEE 802.15.4 protocol.
4. The data reception method of claim 1 , where separately demodulating the data payload portion of the given data packet comprises performing offset quadrature phase-shift keying (OQPSK) demodulation on the data payload portion of the given data packet.
5. The data reception method of claim 1 , wherein the given data packet includes a frame structure comprising a synchronization header (SHR) structure, a packet header (PHR) structure and a Media Access Control (MAC) protocol data unit (MPDU) structure, wherein determining if the given data packet is a high-speed data packet is dependent upon a predetermined start of frame delimiter (SFD) value in the SHR structure.
6. The data reception method of claim 5 , wherein the PHR structure is two bytes in length, and wherein the MPDU structure is up to 32,767 bytes in length.
7. A wireless communication device, comprising:
an interface circuit configured to receive a wireless signal that conveys a plurality of data packets; and
a modem circuit configured to:
detect a preamble sequence of a synchronization header for a given data packet of the plurality of data packets;
establish an initial time synchronization dependent upon detection of the preamble sequence included in the synchronization header;
determine if the given data packet of the plurality of data packets is a high-speed data packet dependent upon a predetermined value of a start of frame delimiter included in the synchronization header;
demodulate the synchronization header of the given data packet using a dispreading process in response to a determination that the given data packet is a high-speed data packet; and
separately demodulate a data payload portion of the given data packet using a non-despreading process in response to the determination that the given data packet is a high-speed data packet.
8. The wireless communication device of claim 7 , wherein the modem circuit is further configured to demodulate the the synchronization header in accordance with IEEE 802.15.4 protocol.
9. The wireless communication device of claim 8 , wherein the modem circuit is further configured to the initial synchronization in accordance with the IEEE 802.15.4protocol.
10. The wireless communication device of claim 7 , wherein to demodulate the data payload portion of the given data packet, the modem circuit is further configured to perform offset quadrature phase-shift keying (OQPSK) demodulation on the data payload portion of the given data packet.
11. The wireless communication device of claim 7 , wherein the given data packet includes a data frame structure comprising a synchronization header (SHR) structure, a packet header (PHR) structure and a Media Access Control (MAC) protocol data unit (MPDU) structure, and wherein the modem circuit is further configured to determine if the given data packet is a high-speed data packet dependent upon a predetermined start of frame delimiter (SFD) value in the SHR structure.
12. The wireless communication device of claim 11 , wherein the PHR structure is two bytes in length and wherein the MPDU structure is up to 32,767 bytes in length.