IP Library Granted Patent US 9,495,489
Granted Patent B2
US 9,495,489 · App. 14/293,289 · Granted Nov 15, 2016

Correlation of test results and test coverage for an electronic device design

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Quick Facts
Patent No.
US 9,495,489
App. No.
14/293,289
Granted
Nov 15, 2016
Kind
B2
Abstract

A device simulation system performs a set of tests by applying, for each test in the set, a corresponding test stimulus to a simulation of the electronic device. In response to each test stimulus, the simulation generates corresponding output information which the device simulation system compares to a specified expected outcome to identify a test result for that test stimulus. In addition, for each test stimulus, the device simulation system generates test coverage information indicating the particular configuration of the simulated electronic device that resulted from the stimulus. The device simulation system correlates the coverage information with the test results to identify correlation rules that indicate potential relationships between test results and configurations of the simulated device.

Claims (43)

1. A computer-implemented method comprising:

applying first stimuli to a simulation of an electronic device design to generate a first plurality of test results;

correlating the first plurality of test results with first coverage data to identify first correlation rules indicating correlations between the first plurality of test results and configurations of modules of the electronic device design, the first coverage data indicating states of a plurality of configuration variables representing configurations of modules of the electronic device design;

modifying data files corresponding to the electronic device design based on the first correlation rules; and

fabricating an electronic device based on the modified data files.

2. The method of claim 1 , further comprising:

generating second stimuli based on the first correlation rules.

3. The method of claim 2 , further comprising:

applying the second stimuli at the simulation of the electronic device design to generate a second plurality of test results based on the electronic device design.

4. The method of claim 3 , further comprising:

correlating the second plurality of test results with second coverage data to identify second correlation rules for the electronic device design.

5. The method of claim 4 , further comprising:

identifying a strength value based on a first correlation rule of the first correlation rules and a corresponding second correlation rule of the second correlation rules, the strength value indicative of a confidence associated with the first correlation rule and a number of simulations associated with the first correlation rule.

6. The method of claim 5 , further comprising:

identifying the first correlation rule in an rules report based on the strength value.

7. The method of claim 4 , further comprising:

iteratively generating stimuli and correlation rules based on the first correlation rules until a stop threshold is reached.

8. The method of claim 7 , wherein the stop threshold is based on a number of simulations of the electronic device design.

9. The method of claim 7 , wherein the stop threshold is based on an amount of time.

10. The method of claim 7 , wherein the stop threshold is based on a number of correlation rules being associated with a threshold confidence value.

11. A device simulation system, comprising:

a stimulus generator to generate stimuli;

a simulator to simulate operation of an electronic device based on the stimuli and an electronic device design to generate a test results; and

a correlation and data mining module to correlate the test results with coverage data to identify correlation rules indicating correlations between the test results and configurations of modules of the electronic device design, the coverage data indicating states of a plurality of configuration variables representing configurations of modules of the electronic device design, and to modify data files corresponding to the electronic device design, and to fabricate an electronic device based on the modified data files.

12. A non-transitory computer-readable media tangibly embodying a set of executable instructions, the set of executable instructions to manipulate at least one processor to:

apply first stimuli at a simulation of an electronic device design to generate a first plurality of test results and first coverage data;

correlate the first plurality of test results with the first coverage data to identify first correlation rules indicating correlations between the first plurality of test results and configurations of modules of the electronic device design, the first coverage data indicating states of a plurality of configuration variables representing the configurations of modules of the electronic device design;

modify data files corresponding to the electronic device design based on the first correlation rules; and

fabricate an electronic device based on the modified data files.

13. The computer-readable media of claim 12 , further comprising instructions to:

generate second stimuli based on the first correlation rules.

14. The computer-readable media of claim 13 , further comprising instructions to:

apply the second stimuli to generate a second plurality of test results based on the electronic device design.

15. The computer-readable media of claim 14 , further comprising instructions to:

correlate the second plurality of test results with second coverage data to identify second correlation rules for the electronic device design.

16. The computer-readable media of claim 15 , further comprising instructions to:

identify a strength value based on a first correlation rule of the first correlation rules and a corresponding second correlation rule of the second correlation rules.

17. The computer-readable media of claim 16 , further comprising instructions to:

identify the first correlation rule in a rules report based on the strength value.

18. The computer-readable media of claim 15 , further comprising instructions to:

iteratively generate stimuli and correlation rules based on the first correlation rules until a stop threshold is reached.

19. The computer-readable media of claim 18 , wherein the stop threshold is based on a number of simulations of the electronic device design.

20. The computer-readable media of claim 18 , wherein the stop threshold is based on an amount of time.

Assignments (17)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
MERGER Recorded Jan 3, 2017
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 041144/0363 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 14/258,829 AND REPLACE ITWITH 14/258,629 PREVIOUSLY RECORDED ON REEL 037444 FRAME 0082. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OFSECURITY INTEREST IN PATENTS. Recorded Aug 10, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039639/0332 →
CORRECTIVE ASSIGNMENT OF INCORRECT APPLICATION 14/258,829 PREVIOUSLY RECORDED ON REEL 037444 FRAME 0109. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Aug 10, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039639/0208 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 5, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037444/0082 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 5, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037444/0109 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0903 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Aug 1, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 033462/0293 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Aug 1, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 033462/0267 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Aug 1, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 033460/0337 →
DOCKET NO. AM20947MC IS BEING CHANGED TO AM20957MC. Recorded Jun 6, 2014
From: CARLIN, ALAN J.; CAVALCANTI, HUGO M.; MCCALLUM, JONATHAN W.; NGUYEN, HUY
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 033099/0415 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 2, 2014
From: CARLIN, ALAN J.; CAVALCANTI, HUGO M.; MCCALLUM, JONATHAN W.; NGUYEN, HUY
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 033008/0638 →