IP Library Granted Patent US 9,733,981
Granted Patent B2
US 9,733,981 · App. 14/300,762 · Granted Aug 15, 2017

System and method for conditional task switching during ordering scope transitions

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Quick Facts
Patent No.
US 9,733,981
App. No.
14/300,762
Granted
Aug 15, 2017
Kind
B2
Abstract

A data processing system includes a processor core and a hardware module. The processor core performs tasks on data packets. The ordering scope manager stores a first value in a first storage location. The first value indicates that exclusive execution of a first task in a first ordering scope is enabled. In response to a relinquish indicator being received, the ordering scope manager stores a second value in the first storage location. The second value indicates that the exclusively execution of the first task in the first ordering scope is disabled.

Claims (36)

1. A method comprising:

storing, by an ordering scope manager, a first value in a first storage location, the first value indicating that exclusive execution of a first task in a first ordering scope is enabled;

in response to receiving, at the ordering scope manager, a relinquish indicator, storing a second value in the first storage location, the second value indicating that the exclusive execution of the first task in the first ordering scope is disabled;

receiving, at the ordering scope manager, a request to exclusively execute a second task in the first ordering scope prior to receiving the relinquish indicator;

inhibiting the exclusive execution of the second task in the first ordering scope while the first value is stored in the first storage location, and

in response to storing the second value in the first storage location, storing the first value at a second storage location indicating that exclusive execution of the second task in the first ordering scope is enabled, wherein non-exclusive execution of the first task in the first ordering scope and the exclusive execution of the second task in the first ordering scope the second task are concurrently enabled.

2. The method of claim 1 , wherein the relinquish indicator is provided by a processor core assigned the first task.

3. The method of claim 1 , further comprising:

receiving a release request for the first task in the first ordering scope;

providing, by the ordering scope manger, a release of the exclusive execution of the first task in the first ordering scope;

in response to the release of the exclusive execution of the first task in the first ordering scope being provided, beginning, at a processor core, exclusive execution of the first task in the first ordering scope; and

passing exclusive execution the first task in the first ordering scope to a hardware accelerator.

4. The method of claim 3 , wherein the relinquish indicator is received from the hardware accelerator.

5. The method of claim 1 , wherein storing the first value in the first storage location is performed concurrently with execution of a task switch instruction in a processor core.

6. The method of claim 1 , wherein storing the second value in the first storage location is performed concurrently with the non-exclusive execution of the first task in the first ordering scope.

7. A data processing system comprising:

a processor core, the processor core configured to perform tasks on data packets; and

an ordering scope manager configured to communicate with the processor core, the ordering scope manager configured to store a first value in a first storage location, the first value to indicate that exclusive execution of a first task in a first ordering scope is enabled, and in response to a relinquish indicator being received, configured to store a second value in the first storage location, the second value to indicate that the exclusive execution of the first task in the first ordering scope is disabled, to receive a request to exclusively execute a second task in the first ordering scope, configured to inhibit the exclusive execution of the second task in the first ordering scope while the first value is stored in the first storage location, and in response to the second value being stored in the first storage location, configured to store the first value in a second storage location to indicate that exclusive execution of the second task in the first ordering scope is enabled.

8. The data processing system of claim 7 , wherein the processor core is configured to receive an indication that the exclusive execution of the first task in the first ordering scope is enabled, and configured to pass the exclusive execution of the first task in the first ordering scope to a hardware accelerator.

9. The data processing system of claim 8 , wherein the hardware accelerator provides the relinquish indicator to the ordering scope manager.

10. The method of claim 8 , wherein the hardware accelerator is a resource external to the processor core.

11. The data processing system of claim 7 , wherein the processor core provides the relinquish indicator to the ordering scope manager.

12. The data processing system of claim 11 , wherein the processor core provides the relinquish indicator in response to an instruction executed by the processor core.

13. The data processing system of claim 12 , wherein the first and second storage locations are local to the ordering scope manager.

14. A method comprising:

receiving, at a first processor core, a release for exclusive execution of a first task in a first ordering scope;

storing a first value in a first storage location in response to receiving the release for the exclusive execution of the first task in the first ordering scope;

exclusively executing, at the first processor core, the first task in the first ordering scope in response to receiving the release for the exclusive execution of the first task in the first ordering scope;

providing a relinquish indicator to relinquish the exclusive execution of the first task in the first ordering scope, wherein non-exclusive execution of the first task in the first ordering scope begins without an intervening task switch instruction in response to providing the relinquish indicator;

receiving a request to begin exclusive execution of a second task in the first ordering scope;

inhibiting the exclusive execution of the second task in the first ordering scope while the first value is stored in the first storage location; and

in response to the relinquish indicator being provided, enabling exclusive execution of the second task in the first ordering scope, wherein non-exclusive execution of the first task in the first ordering scope and the exclusive execution of the second task in the first ordering scope the second task are concurrently enabled.

15. The method of claim 14 , further comprising:

passing the exclusive execution of the first task in the first ordering scope to a hardware accelerator.

16. The method of claim 15 , wherein the relinquish indicator is provided from the hardware accelerator.

17. The method of claim 14 , wherein the relinquish indicator is provided from the processor core.

Assignments (17)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040626 FRAME: 0683. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME EFFECTIVE NOVEMBER 7, 2016. Recorded Jan 12, 2017
From: NXP SEMICONDUCTORS USA, INC. (MERGED INTO); FREESCALE SEMICONDUCTOR, INC. (UNDER)
To: NXP USA, INC.
Reel/Frame 041414/0883 →
CHANGE OF NAME Recorded Nov 16, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040626/0683 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 14/258,829 AND REPLACE ITWITH 14/258,629 PREVIOUSLY RECORDED ON REEL 037444 FRAME 0082. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OFSECURITY INTEREST IN PATENTS. Recorded Aug 10, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039639/0332 →
CORRECTIVE ASSIGNMENT OF INCORRECT APPLICATION 14/258,829 PREVIOUSLY RECORDED ON REEL 037444 FRAME 0109. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Aug 10, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039639/0208 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 5, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037444/0109 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 5, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037444/0082 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0903 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Aug 1, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 033460/0337 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Aug 1, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 033462/0293 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Aug 1, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 033462/0267 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 10, 2014
From: JOKINEN, TOMMI M.; KARDONIK, MICHAEL; KRAMER, DAVID B.; NEWTON, PETER W.; PILLAR, JOHN F.; XU, KUN
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 033067/0548 →