IP Library Granted Patent US 9,368,672
Granted Patent B2
US 9,368,672 · App. 14/306,731 · Granted Jun 14, 2016

Removal of 3D semiconductor structures by dry etching

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Quick Facts
Patent No.
US 9,368,672
App. No.
14/306,731
Granted
Jun 14, 2016
Kind
B2
Abstract

Various embodiments include methods of fabricating a semiconductor device that include providing a plurality of nanostructures extending away from a support, forming a flowable material layer between the nanostructures, forming a patterned mask over a first portion of the flowable material and the first portion of the plurality of nanostructures, such that a second portion of the flowable material and a second portion of the plurality of nanostructures are not located under the patterned mask and etching the second portion of the flowable material and the second portion of the plurality of nanostructures to remove the second portion of the flowable material and the second portion of the plurality of nanostructures to leave the first portion of the flowable material and the first portion of the plurality of nanostructures unetched.

Claims (33)

1. An etching method comprising:

providing a plurality of nanostructures extending away from a support;

forming a flowable material layer between the nanostructures;

forming a patterned mask over a first portion of the flowable material and the first portion of the plurality of nanostructures, such that a second portion of the flowable material and a second portion of the plurality of nanostructures are not located under the patterned mask;

etching the second portion of the flowable material and the second portion of the plurality of nanostructures to remove the second portion of the flowable material and the second portion of the plurality of nanostructures to leave the first portion of the flowable material and the first portion of the plurality of nanostructures unetched; wherein:

(i) the flowable material layer comprises a photoresist layer and forming the patterned mask comprises exposingonly an upper portion of the photoresist layer through a photolithography mask with radiation and removing parts of an upper portion of the photoresist overlying the second portion of the flowable material layer; or

(ii) forming the patterned mask comprises patterning the flowable material layer and subsequently depositing a photoresist layer over the patterned flowable material layer; or

(iii) the step of etching comprises etching the patterned mask, the second portion of the flowable material and the second portion of the plurality of nanostructures to remove at least a portion of the patterned mask, the second portion of the flowable material and the second portion of the plurality of nanostructures to leave the first portion of the flowable material and the first portion of the plurality of nanostructures unetched.

2. The method of claim 1 , further comprising selectively removing at least a part of the first portion of the flowable material after the step of etching to leave the first portion of the plurality of nanostructures over a support.

3. The method of claim 1 , wherein the nanostructures comprise semiconductor nanowires.

4. The method of claim 1 , wherein the flowable material layer comprises the photoresist layer and forming the patterned mask comprises exposing only the upper portion of the photoresist layer through the photolithography mask with radiation and removing parts of the upper portion of the photoresist overlying the second portion of the flowable material layer.

5. The method of claim 1 , wherein forming the patterned mask comprises depositing a photoresist layer over the flowable material layer and pattering the photoresist.

6. The method of claim 1 , wherein forming the patterned mask comprises patterning the flowable material layer and subsequently depositing the photoresist layer over the patterned flowable material layer.

7. The method of claim 1 , wherein the step of etching comprises etching the patterned mask, the second portion of the flowable material and the second portion of the plurality of nanostructures to remove at least a portion of the patterned mask, the second portion of the flowable material and the second portion of the plurality of nanostructures to leave the first portion of the flowable material and the first portion of the plurality of nanostructures unetched.

8. An etching method comprising:

providing a plurality of nanostructures extending away from a support;

forming a flowable material layer between the nanostructures;

forming a patterned mask over a first portion of the flowable material and the first portion of the plurality of nanostructures, such that a second portion of the flowable material and a second portion of the plurality of nanostructures are not located under the patterned mask;

etching the second portion of the flowable material and the second portion of the plurality of nanostructures to remove the second portion of the flowable material and the second portion of the plurality of nanostructures to leave the first portion of the flowable material and the first portion of the plurality of nanostructures unetched; and

selectively removing the patterned mask and at least a part of the first portion of the flowable material after the step of etching to leave the first portion of the plurality of nanostructures over a support,

wherein the step of etching comprises etching the second portion of the flowable material and the second portion of the plurality of nanostructures to remove the second portion of the flowable material and the second portion of the plurality of nanostructures to leave the patterned mask, the first portion of the flowable material and the first portion of the plurality of nanostructures unetched.

9. The method of claim 1 , further comprising etching the first portion of the flowable material to reduce a height of the first portion of the flowable material between the first portion of the plurality of nanostructures.

10. The method of claim 1 , wherein the flowable material comprises a spin on glass or a photoresist.

11. An etching method comprising:

providing a plurality of nanostructures extending away from a support;

forming a flowable material layer between the nanostructures;

forming a patterned mask over a first portion of the flowable material and the first portion of the plurality of nanostructures, such that a second portion of the flowable material and a second portion of the plurality of nanostructures are not located under the patterned mask;

etching the second portion of the flowable material and the second portion of the plurality of nanostructures to remove the second portion of the flowable material and the second portion of the plurality of nanostructures to leave the first portion of the flowable material and the first portion of the plurality of nanostructures unetched; and

forming an insulating material layer over at least a portion of the plurality of nanowires such that at least a portion of the insulating material layer provides a substantially planar top surface; and

forming an electrical contact over the substantially planar top surface of the insulating material layer.

12. The method of claim 11 , further comprising forming a second electrical contact over the support in an area where the etched second portion of the flowable material and the etched second portion of the plurality of nanostructures were removed.

13. The method of claim 11 , wherein the nanostructures comprise nanowire LEDs.

14. The method of claim 1 , wherein etching comprises dry etching.

Assignments (10)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 12, 2024
From: GLO TECHNOLOGIES LLC
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 068297/0220 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 6, 2023
From: SYSONAN, INC.
To: GLO TECHNOLOGIES LLC
Reel/Frame 065178/0210 →
CHANGE OF NAME Recorded Oct 5, 2023
From: NANOSYS, INC.
To: SYSONAN, INC.
Reel/Frame 065156/0416 →
TERMINATION AND RELEASE OF PATENT SECURITY AGREEMENT RECORDED AT REEL 059569 / FRAME 0840 Recorded Sep 7, 2023
From: FORTRESS CREDIT CORP.,
To: NANOSYS, INC.
Reel/Frame 064836/0263 →
SECURITY INTEREST Recorded Apr 1, 2022
From: NANOSYS, INC.
To: FORTRESS CREDIT CORP., AS AGENT
Reel/Frame 059569/0840 →
NUNC PRO TUNC ASSIGNMENT Recorded Aug 13, 2021
From: GLO AB
To: NANOSYS, INC.
Reel/Frame 057184/0564 →
RELEASE OF SECURITY INTEREST Recorded Apr 12, 2021
From: HERCULES CAPITAL, INC.
To: GLO AB
Reel/Frame 057210/0690 →
SECURITY INTEREST Recorded Jan 23, 2019
From: GLO AB
To: HERCULES CAPITAL INC.
Reel/Frame 048110/0063 →
ASSIGNMENT OF IP SECURITY AGREEMENT Recorded Dec 12, 2018
From: GLO AB
To: HERCULES CAPITAL, INC., AS ADMINISTRATIVE AGENT
Reel/Frame 049042/0527 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 12, 2016
From: THOMPSON, DANIEL BRYCE; LEMAY, CYNTHIA
To: GLO AB
Reel/Frame 037727/0407 →