IP Library › Granted Patent US 9,723,724
Granted Patent B2
US 9,723,724 · App. 14/327,389 · Granted Aug 1, 2017

Wiring substrate, method of manufacturing wiring substrate, component-embedded glass substrate, and method of manufacturing component-embedded glass substrate

Inventors: Shun Mitarai (Kanagawa, JP); Shusaku Yanagawa (Kanagawa, JP); Shinji Rokuhara (Kanagawa, JP); Shuichi Oka (Kanagawa, JP)
Assignee: Sony Corporation
H05K3/10H01L21/486H01L23/15H01L23/5384H01L23/5385H01L23/5389H01L27/124H01L27/1218H05K1/115H05K1/185H05K1/186H05K3/30H05K3/4697H01L27/3276H01L2224/16225H01L2224/73253H05K3/42H05K3/4605Y10T29/4913Y10T29/49155
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Quick Facts
Patent No.
US 9,723,724
App. No.
14/327,389
Granted
Aug 1, 2017
Kind
B2
Abstract

A method of manufacturing a wiring substrate that has a wiring including a through glass via and is formed of a glass substrate includes forming an alteration layer that penetrates the wiring substrate and is patterned, forming the wiring on a front surface of the wiring substrate in which the alteration layer has been formed, and filling an electrode material in a hole formed by removing the alteration layer, thereby forming the through glass via that connects the wiring on the front surface of the wiring substrate and the wiring on a back surface side thereof.

Claims (19)

1. A method of manufacturing a wiring substrate, comprising:

forming an alteration layer in the wiring substrate, wherein the wiring substrate is a single continuous layer that extends from a front surface of the wiring substrate to a back surface of the wiring substrate, wherein the alteration layer is patterned within the wiring substrate such that the alteration layer extends through the continuous single layer from the front surface of the wiring substrate to the back surface of the wiring substrate, and wherein the wiring substrate comprises a glass substrate;

forming a first wiring on the front surface of the wiring substrate;

removing at least a portion of the alteration layer to form a through glass via in the glass substrate, wherein the through glass via does not extend through an additional wiring substrate; and

filling an electrode material within the through glass via, wherein the electrode material connects the first wiring on the front surface of the wiring substrate to a second wiring on the back surface of the wiring substrate.

2. The method of manufacturing a wiring substrate according to claim 1 , wherein

the glass substrate is formed of photosensitive glass in which the patterned alteration layer is formed by exposure to a light source and a heat treatment through a mask.

3. The method of manufacturing a wiring substrate according to claim 1 , wherein

the glass substrate is formed of non-photosensitive glass, and by exposure and a heat treatment through a mask, the patterned alteration layer is formed therein.

4. The method of manufacturing a wiring substrate according to claim 1 , wherein

the patterned alteration layer is formed by collected laser pulse irradiation.

5. The method of manufacturing a wiring substrate according to claim 1 , wherein

the patterned alteration layer is removed by using a chemical having selectivity with the glass substrate, and the through glass via extends from the front surface of the wiring substrate to the back surface of the wiring substrate.

6. The method of manufacturing a wiring substrate according to claim 1 , wherein

the wiring substrate further comprises an active element, and

the active element is formed prior to the electrode material being filled within the through glass via.

7. The method of manufacturing a wiring substrate according to claim 6 , wherein

a difference between a thermal expansion coefficient of the patterned alteration layer and a thermal expansion coefficient of a non-alteration layer other than the alteration layer is smaller than approximately 5 ppm/° C.

8. A wiring substrate manufactured by the method of manufacturing a wiring substrate according to claim 1 .

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 10, 2014
From: MITARAI, SHUN; YANAGAWA, SHUSAKU; ROKUHARA, SHINJI; OKA, SHUICHI
To: SONY CORPORATION
Reel/Frame 033287/0830 →
Priority Claims (2)
JP 2013-147551 · Jul 16, 2013 · national
JP 2014-096477 · May 8, 2014 · national
Continuity (1)
Related Publication 20150021081A1 · Jan 22, 2015