Fin field-effect transistor (FinFET) device formed using a single spacer, double hardmask scheme

1. A method for forming a fin field-effect transistor (FinFET) device, the method comprising:

forming a set of spacers along each sidewall of a plurality of fins of the FinFET device;

forming a first ultra-thin hardmask over the FinFET device;

implanting the first ultra-thin hardmask over a first set of fins from the plurality of fins;

removing the first ultra-thin hardmask over a second set of fins from the plurality of fins untreated by the implant;

forming an epitaxial (epi) layer over the second set of fins;

forming a second ultra-thin hardmask over the FinFET device;

implanting the second ultra-thin hardmask;

removing the second ultra-thin hardmask over the first set of fins; and

growing an epi layer over the first set of fins.

2. The method according to claim 1 , further comprising removing, following the growth of the epi layer over the first set of fins, a capping layer from atop a gate electrode of a gate structure formed over the plurality of fins.

3. The method according to claim 2 , the forming the set of spacers comprising:

depositing a spacer layer over the gate structure and the plurality of fins; and

etching the spacer layer from atop the gate structure and from atop the plurality of fins.

4. The method according to claim 2 , the implanting the first ultra-thin hardmask comprising:

forming a first lithography structure over the second set of fins;

performing a carbon-plasma and anneal process to the first set of fins and to a portion of the gate structure left uncovered by the hardmask;

removing the mask; and

applying a diluted hydrofluoric acid (dHF) to the FinFET device.

5. The method according to claim 1 , further comprising:

etching the second set of fins to form a cavity, wherein the epi layer over the second set of fins forms within the cavity; and

etching the spacer layer along a sidewall of the gate structure.

6. The method according to claim 1 , the removing the second ultra-thin hardmask over the first set of fins comprising:

forming a second lithography structure over the second set of fins; and

performing an anisotropic oxide spacer etch to the FinFET device.

7. The method according to claim 6 , further comprising etching the first set of fins to form a set of cavities, wherein the epi layer over the first set of fins is formed within the set of cavities.

8. The method according to claim 1 , wherein the first ultra-thin hardmask and the second ultra-thin hardmask each have a thickness of approximately 20-30 Å.

9. A method for forming a fin field-effect transistor (FinFET) device, the method comprising:

forming a set of spacers along each sidewall of a plurality of fins of the FinFET device;

forming a first ultra-thin hardmask over the plurality of fins;

implanting the first ultra-thin hardmask over a first set of fins from the plurality of fins;

removing the first ultra-thin hardmask over a second set of fins from the plurality of fins untreated by the implant;

forming an epitaxial (epi) layer over the second set of fins;

forming a second ultra-thin hardmask over the FinFET device;

implanting the second ultra-thin hardmask;

removing the second ultra-thin hardmask over the first set of fins; and

growing an epi layer over the first set of fins.

10. The method according to claim 9 , further comprising removing, following the growth of the epi layer over the first set of fins, a capping layer from atop a gate electrode of a gate structure formed over the plurality of fins.

11. The method according to claim 10 , the forming the set of spacers comprising:

depositing a spacer layer over the gate structure and the plurality of fins; and

etching the spacer layer from atop the gate structure and from atop the plurality of fins.

12. The method according to claim 10 , the forming the first ultra-thin hardmask comprising:

forming a lithography structure over the second set of fins;

performing a carbon-plasma and anneal process to the first set of fins and to a portion of the gate structure left uncovered by the hardmask;

removing the mask; and

applying a diluted hydrofluoric (dHF) acid to the FinFET device.

13. The method according to claim 9 , further comprising:

etching the second set of fins to form a cavity, wherein the epi layer over the second set of fins forms within the cavity; and

etching the spacer layer along a sidewall of the gate structure.

14. The method according to claim 9 , the removing the second ultra-thin hardmask over the first set of fins comprising:

forming a second lithography structure over the second set of fins; and

performing an anisotropic oxide spacer etch to the FinFET device.

15. The method according to claim 14 , further comprising etching the first set of fins to form a set of cavities, wherein the epi layer over the first set of fins is formed within the set of cavities.

16. The method according to claim 9 , wherein the first ultra-thin hardmask and the second ultra-thin hardmask each have a thickness of approximately 20-30 Å.

17. A semiconductor device, comprising:

a gate structure over a plurality of fins formed from a substrate;

a first epitaxial (epi) layer formed over a first set of fins from the plurality of fins, the first set of fins each having a first ultra-thin hardmask over a set of spacers formed on sidewalls of each of the first set of fins;

a second epi layer formed over a second set of fins from the plurality of fins; and

a second ultra-thin hardmask formed over each of: the second set of fins, and a section of the gate structure adjacent the second set of fins.

18. The semiconductor device of claim 17 , wherein the first set of fins comprise fins of an N-type metal-oxide-semiconductor, and wherein the second set of fins comprise fins of a P-type metal-oxide-semiconductor.

19. The semiconductor device of claim 17 , each of the first and second ultra-thin hardmasks comprising silicon oxy carbide.

20. The semiconductor device of claim 17 , each of the first and second ultra-thin hardmasks having a thickness of approximately 20-30 Å.