Copper pillar bump with cobalt-containing sidewall protection layer

1. A method of forming an integrated circuit device, the method comprising:

forming a metal pillar over a semiconductor substrate;

forming a solder layer over the metal pillar;

forming a metallization layer comprising a cobalt (Co) element, the metallization layer covering the metal pillar and the solder layer;

thermally reflowing the solder layer to form a solder bump, driving the Co element of the metallization layer into the solder bump; and

oxidizing the metallization layer to form a metal oxide layer on a sidewall surface of the metal pillar.

2. The method of claim 1 , wherein the metal pillar is a copper pillar and the metallization layer is a Co layer.

3. The method of claim 1 , wherein the metallization layer is formed by an electroless deposition.

4. The method of claim 1 , further comprising:

forming a metal cap layer between the metal pillar and the solder layer before forming the metallization layer.

5. The method of claim 4 , wherein the metal cap layer comprises nickel.

6. The method of claim 1 , wherein the metal oxide layer is a cobalt oxide layer.

7. A method of forming an integrated circuit device, the method comprising:

forming an under-bump-metallurgy (UBM) layer over a semiconductor substrate;

forming a conductive pillar on the UBM layer, wherein the conductive pillar is formed having a sidewall surface, the sidewall surface being formed having a first length; and

forming a cobalt oxide layer having a surface directly contacting the sidewall surface of the conductive pillar,

wherein the cobalt oxide layer is formed such that the surface of the cobalt oxide layer has a second length greater than the first length and a bottom surface of the conductive pillar is free of the cobalt oxide layer.

8. The method of claim 7 , further comprising:

forming a solder layer comprising a cobalt (Co) element over the conductive pillar.

9. The method of claim 8 , wherein the solder layer is formed comprising a lead-free solder material layer.

10. The method of claim 8 , further comprising:

forming a metal cap layer between the conductive pillar and the solder layer.

11. The method of claim 10 , wherein the cobalt oxide layer is formed covering a sidewall surface of the metal cap layer.

12. The method of claim 10 , wherein the metal cap layer is formed comprising nickel.

13. The method of claim 7 , wherein the conductive pillar is a copper pillar.

14. A method of forming an integrated circuit device, comprising:

forming a conductive pillar over a substrate, wherein the conductive pillar is formed having a sidewall surface, the sidewall surface being formed having a first length; and

forming a cobalt oxide layer having a surface directly contacting the sidewall surface of the conductive pillar,

wherein the cobalt oxide layer is formed such that the surface of the cobalt oxide layer has a second length greater than the first length and a bottom surface of the conductive pillar is free of contacting the cobalt oxide layer.

15. The method of claim 14 , further comprising forming a solder layer over the conductive pillar, wherein the solder layer comprises a cobalt (Co) element.

16. The method of claim 15 , wherein the solder layer comprises a lead-free solder material layer.

17. The method of claim 15 , further comprising forming a metal cap layer over the conductive pillar prior to the forming the solder layer.

18. The method of claim 17 , wherein the cobalt oxide layer extends to cover a sidewall surface of the metal cap layer.

19. The method of claim 17 , wherein the metal cap layer is formed comprising nickel.

20. The method of claim 14 , wherein the conductive pillar is a copper pillar.