Wafer level flat no-lead semiconductor packages and methods of manufacture
Methods of manufacturing semiconductor packages. Implementations may include: providing a substrate with a first side, a second side, and a thickness; forming a plurality of pads on the first side of the substrate; and applying die attach material to the plurality of pads. The method may include bonding a wafer including a plurality of semiconductor die to the substrate at one or more die pads included in each die. The method may also include singulating the plurality of semiconductor die, overmolding the plurality of semiconductor die and the first side of the substrate with an overmold material, and removing the substrate to expose the plurality of pads and to form a plurality of semiconductor packages coupled together through the overmold material. The method also may include singulating the plurality of semiconductor packages to separate them.
1. A method of manufacturing a semiconductor package, the method comprising:
providing a substrate, the substrate having a first side, a second side, and a thickness between the first side and the second side;
forming a plurality of pads on the first side of the substrate;
applying die attach material to the plurality of pads;
bonding a wafer comprising a plurality of semiconductor die to the substrate at one or more die pads comprised in each die of the plurality of semiconductor die through the plurality of pads of the substrate;
singulating the plurality of semiconductor die before overmolding the plurality of semiconductor die and the first side of the substrate with an overmold material;
removing the substrate after overmolding the plurality of semiconductor die to expose the plurality of pads and to form a plurality of semiconductor packages coupled together through the overmold material; and
singulating the plurality of semiconductor packages to separate each of the plurality of semiconductor packages from each other.
2. The method of claim 1 , wherein removing the substrate to expose the plurality of pads further comprises removing the second side and the thickness of the substrate.
3. The method of claim 1 , wherein providing the substrate further comprises providing the substrate with the first side dimensioned to cover one of one quarter, one half, three quarters, and an entire size of the wafer.
4. The method of claim 1 , wherein forming the plurality of pads on the first side of the substrate further comprises one of selectively etching the first side of the substrate to form the plurality of pads and plating the plurality pads on the substrate.
5. The method of claim 1 , wherein bonding the wafer comprising the plurality of semiconductor die to the substrate further comprises one of bonding through reflowing the plurality of pads and the one or more die pads of the plurality of die using a reflow process and curing the die attach material between the plurality of pads and the one or more die pads using a curing process.
6. The method of claim 1 , wherein removing the substrate to expose the plurality of pads further comprises selectively removing the substrate to leave one or more portions of the substrate for use in one of aligning the plurality of semiconductor packages during singulation and electrically connecting one or more of the semiconductor packages to one or more other semiconductor packages.
7. The method of claim 1 , wherein applying die attach material to the one or more pads further comprises applying the die attach material to a predetermined number of the plurality of pads and not applying the die attach material to the remaining pads.