IP Library Granted Patent US 9,257,335
Granted Patent B2
US 9,257,335 · App. 14/426,302 · Granted Feb 9, 2016

Electronic devices utilizing contact pads with protrusions and methods for fabrication

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,257,335
App. No.
14/426,302
Granted
Feb 9, 2016
Kind
B2
Abstract

An electronic device includes a substrate including a front side, a back side, a thickness between the front side and back side, one or more front-side vias extending from the front side into a part of the thickness, and an interconnect via extending from the back side toward the front side; a contact pad on the front side and including one or more protrusions extending through corresponding front-side vias and into the interconnect via; and an interconnect extending through the interconnect via and into contact with the protrusion(s).

Claims (39)

1. A method for fabricating an electronic device, the method comprising:

forming a front-side via in a substrate, the substrate comprising a front side, a back side and a thickness between the front side and the back side, wherein the front-side via extends from the front side into a part of the thickness;

forming a contact pad comprising a protrusion, by depositing a contact pad material on the front side such that the contact pad material fills the front-side via;

forming an interconnect via by etching the substrate from the back side until exposing the protrusion in the interconnect via; and

forming an interconnect in contact with the contact pad by depositing an interconnect material in the interconnect via such that the interconnect material is at least conformally disposed on a portion of the back side surrounding the interconnect via, on a wall of the substrate circumscribing a cross-section of the interconnect via, and on the protrusion.

2. The method of claim 1 , wherein forming the contact pad comprises forming a base layer from which the protrusion extends to a distance ranging from 0.005 μm to 750 μm.

3. The method of claim 1 , wherein the protrusion has a characteristic dimension ranging from 0.25 μm to 400 μm.

4. The method of claim 1 , wherein the protrusion has a rectilinear cross-section in a plane transverse to the thickness, and the protrusion is elongated in one dimension of the cross-section.

5. The method of claim 1 , wherein forming the front-side via comprises forming a pattern of front-side vias, the contact pad comprises a pattern of protrusions, forming the interconnect via comprises exposing the protrusions in the interconnect via, and forming the interconnect comprises depositing the interconnect material on the protrusions.

6. The method of claim 5 , wherein forming the contact pad comprises forming a two-dimensional array of protrusions.

7. The method of claim 5 , wherein each protrusion is spaced from at least one adjacent protrusion by a distance ranging from 0.25 μm to 400 μm.

8. The method of claim 5 , wherein forming the pattern comprises forming at least a first protrusion and a second protrusion each having a rectilinear cross-section in a plane transverse to the thickness, and the first protrusion and the second protrusion are elongated in mutually orthogonal directions.

9. The method of claim 1 , wherein forming the interconnect comprises filling the interconnect via with the interconnect material through substantially the entire thickness.

10. The method of claim 1 , comprising forming a current-carrying element in contact with the interconnect by patterning the interconnect material disposed on the back side.

11. The method of claim 1 , comprising forming an insulating layer on the front side, wherein the front-side via is formed through the insulating layer and the protrusion extends through the insulating layer.

12. The method of claim 11 , wherein forming the interconnect via comprises etching the substrate down to the insulating layer, and forming the interconnect comprises depositing the interconnect material on the insulating layer.

13. The method of claim 11 , wherein the insulating layer on the front side is a first insulating layer, and further comprising conformally depositing a second insulating layer on the back side, the wall and the protrusion, and re-exposing at least a portion of the protrusion by selectively etching the second insulating layer, and wherein forming the interconnect comprises conformally depositing the interconnect material on the second insulating layer and on the re-exposed portion of the protrusion.

14. The method of claim 1 , comprising forming a plurality of interconnects, wherein each interconnect is in contact with a respective contact pad.

15. A method for fabricating an electronic package, comprising:

fabricating a first electronic device according to claim 1 ; and

integrating the first electronic device with a second electronic device such that the interconnect is in signal communication with a current-carrying element of the second electronic device.

16. An electronic device fabricated according to the method of claim 1 .

17. An electronic device, comprising:

a substrate comprising a front side, a back side, a thickness between the front side and the back side, a front-side via extending from the front side into a part of the thickness, and an interconnect via extending from the back side toward the front side;

a contact pad comprising a base layer disposed on the front side and a protrusion extending from the base layer, through the front-side via and into the interconnect via; and

an interconnect extending through the interconnect via and into contact with the protrusion, wherein the interconnect is disposed on a portion of the back side surrounding the interconnect via, on a wall of the substrate circumscribing a cross-section of the interconnect via, and on the protrusion.

18. The electronic device of claim 17 , wherein the interconnect via is larger in cross-sectional area than the front-side via by a factor ranging from 0 to 100%.

19. The electronic device of claim 17 , wherein the protrusion extends from the base layer to a distance ranging from 0.005 μm to 750 μm.

20. The electronic device of claim 17 , wherein the protrusion has a characteristic dimension ranging from 0.25 μm to 400 μm.

21. The electronic device of claim 17 , wherein the protrusion has a rectilinear cross-section in a plane transverse to the thickness, and the protrusion is elongated in one dimension of the cross-section.

22. The electronic device of claim 17 , wherein the front-side via comprises a pattern of front-side vias, the contact pad comprises a pattern of protrusions extending through respective front-side vias into the interconnect via, and the interconnect contacts each protrusion.

23. The electronic device of claim 22 , wherein the contact pad comprises a two-dimensional array of protrusions.

24. The electronic device of claim 22 , wherein each protrusion is spaced from at least one adjacent protrusion by a distance ranging from 0.25 μm to 400 μm.

25. The electronic device of claim 22 , wherein the pattern comprises at least a first protrusion and a second protrusion each having a rectilinear cross-section in a plane transverse to the thickness, and the first protrusion and the second protrusion are elongated in mutually orthogonal directions.

26. The electronic device of claim 17 , wherein the interconnect fills the interconnect via through substantially the entire thickness.

27. The electronic device of claim 17 , comprising an insulating layer on the front side, wherein the front-side via is formed through the insulating layer and the protrusion extends through the insulating layer.

28. The electronic device of claim 27 , wherein the insulating layer on the front side is a first insulating layer, and further comprising a second insulating layer disposed on the back side and the wall wherein the second insulating layer isolates the substrate from the interconnect.

29. The electronic device of claim 17 , comprising forming a plurality of interconnects, wherein each interconnect is in contact with a respective contact pad.

30. An electronic package, comprising: a first electronic device according to claim 17 ; and a second electronic device integrated with the first electronic device such that the interconnect is in signal communication with a current-carrying element of the second electronic device.

Assignments (8)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 10, 2020
From: RESEARCH TRIANGLE INSTITUTE
To: MICROSS ADVANCED INTERCONNECT TECHNOLOGY, LLC
Reel/Frame 052133/0362 →
SECURITY AGREEMENT Recorded Feb 6, 2020
From: MICROSS ADVANCED INTERCONNECT TECHNOLOGY LLC; SILICON TURNKEY SOLUTIONS, INC.
To: ALLY BANK, AS ASSIGNEE
Reel/Frame 051836/0697 →
RELEASE OF SECURITY INTEREST Recorded Feb 6, 2020
From: MIDCAP FINANCIAL TRUST
To: MICROSS ADVANCED INTERCONNECT TECHNOLOGY LLC
Reel/Frame 051834/0394 →
SECURITY INTEREST Recorded Aug 7, 2017
From: MICROSS ADVANCED INTERCONNECT TECHNOLOGY LLC
To: MIDCAP FINANCIAL TRUST
Reel/Frame 043476/0302 →
RELEASE OF SECURITY INTEREST Recorded Aug 7, 2017
From: ALLY BANK
To: MICROSS ADVANCED INTERCONNECT TECHNOLOGY LLC
Reel/Frame 043479/0071 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 18, 2016
From: RESEARCH TRIANGLE INSTITUTE
To: MICROSS ADVANCED INTERCONNECT TECHNOLOGY LLC
Reel/Frame 040387/0745 →
GRANT OF SECURITY INTEREST IN PATENTS Recorded Oct 5, 2016
From: MICROSS ADVANCED INTERCONNECT TECHNOLOGY LLC
To: ALLY BANK
Reel/Frame 040229/0512 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 26, 2015
From: VICK, ERIK PAUL; CUNNINGHAM, GARRY BRIAN; TEMPLE, DOROTA
To: RESEARCH TRIANGLE INSTITUTE
Reel/Frame 035265/0611 →